similar to: [PATCH] nv50: Fix GPU_READING/WRITING bit removal

nv30 seems to not support dma objects with offset, so simply extend the query_heap to cover the entire notifier, and use a offset in nv30_context_kick_notify. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_buffer.c | 14 +- src/gallium/drivers/nouveau/nouveau_context.h | 5 +

On Tue, Jun 17, 2014 at 2:34 AM, Maarten Lankhorst <maarten.lankhorst at canonical.com> wrote: > nv30 seems to not support dma objects with offset, so simply extend the query_heap to cover the > entire notifier, and use a offset in nv30_context_kick_notify. It would be great if you could detail the list of transformations that were done in the commit description, as well as what the

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- All the arb_texture_cube_map_array piglits pass except the sampler-cube-shadow one. However, nva0+ appear to all fail at the non-array version of that test, sampler-cube-shadow, so I think it's very likely to be related. Probably some sampler setup bits changed. src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 5

Different textures may be bound to each slot for each stage. So we need to be able to upload ms parameters for each one without stages overwriting each other. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.1 10.2" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 4 ++++

This one maps textures to sampler units (or textures to texture units or whatever it's called), which wasn't done before. It should make the mesa demo "multiarb" work, at least with the shader patches I sent earlier. Of course, with this functionality one probably wouldn't have to setup the textures in NV50_TIC anew every time, but that can be optimized later.

Add proper flushes for TIC and TSC and remove the costly 2D.0110 flush in nv50_flush. Correct TIC and TSC bo sizes. --- src/gallium/drivers/nv50/nv50_context.c | 7 --- src/gallium/drivers/nv50/nv50_context.h | 5 ++ src/gallium/drivers/nv50/nv50_screen.c | 25 ++--------- src/gallium/drivers/nv50/nv50_state_validate.c | 53 +++++++++++++++++++++---

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-

This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers as specified by glDrawBuffers). This implementation is highly based on a larger commit by Christoph Bumiller <e0425955 at student.tuwien.ac.at> in his gallium-nine branch. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/nv50/nv50_defs.xml.h | 1 +

On Thu, Jan 23, 2014 at 2:40 PM, Emil Velikov <emil.l.velikov at gmail.com> wrote: > On 17/01/14 02:23, Ilia Mirkin wrote: >> This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers >> as specified by glDrawBuffers). >> >> This implementation is highly based on a larger commit by >> Christoph Bumiller <e0425955 at student.tuwien.ac.at>

On 17/01/14 02:23, Ilia Mirkin wrote: > This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers > as specified by glDrawBuffers). > > This implementation is highly based on a larger commit by > Christoph Bumiller <e0425955 at student.tuwien.ac.at> in his gallium-nine > branch. > Ilia, Do you know why we cannot set the rt height to 64? After all you

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4

Thanks for the last info it was truely helpful. Anyways, I'm currently trying to implement 3D textures into yuzu, as far as I know they are twiddled in a different manner to 2D textures. Could one of you guys point me in the right direction? I've been meddling around: https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nv50/nv50_tex.c but I can't see where the

This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers as specified by glDrawBuffers). Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Not sure whether something needs to be done to clear out the old RT_* settings for that index buffer, or if things are cleared out implicitly. Perhaps instead of skipping indices, RT_CONTROL needs to be adjusted with the

Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative VRAM domains for chips that do not use dedicated video memory. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- src/gallium/drivers/nouveau/nouveau_buffer.c | 6 ++---- src/gallium/drivers/nouveau/nv50/nv50_miptree.c | 4 ++-- src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 2 +-

Hello Alex, Op 19-11-14 om 06:41 schreef Alexandre Courbot: > Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative > VRAM domains for chips that do not use dedicated video memory. Should we construct a similar patch for NVAA/NVAC (MCP7x) as well? > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- >

Unfortunately there's only one RT_ARRAY_MODE setting for all attachments, so clears were previously truncated to the minimum number of layers any attachment had. Instead set the RT_ARRAY_MODE to 512 (the max number of layers) before doing the clear. This fixes gl-3.2-layered-rendering-clear-color-mismatched-layer-count. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> ---

On Wed, Nov 19, 2014 at 12:41 AM, Alexandre Courbot <acourbot at nvidia.com> wrote: > Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative > VRAM domains for chips that do not use dedicated video memory. > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- > src/gallium/drivers/nouveau/nouveau_buffer.c | 6 ++---- >

Hi Ilia, On 27/06/13 12:26, Ilia Mirkin wrote: > Adds H.264 and MPEG2 codec support via VP2, using firmware from the > blob. Acceleration is supported at the bitstream level for H.264 and > IDCT level for MPEG2. > > Known issues: > - H.264 interlaced doesn't render properly > - H.264 shows very occasional artifacts on a small fraction of videos > - MPEG2 + VDPAU

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- This is my shot at understanding this whole transfer business. The upshot is that after reading through it and understanding it, the transfer logic does appear correct if potentially less-than-perfectly-efficient (e.g. one could keep track of ranges being read/written, etc). src/gallium/drivers/nouveau/nouveau_buffer.c | 71

--- This is still a WIP. Just wanted to get people's opinions. It's also not bullet-proof. Unfortunately nouveau_bo_wait [which is in turn called by nouveau_bo_map] can trigger a kick, so technically we have to have a lock around any nouveau_bo_map. My strategy here was to add locks around all the user-accessible APIs while leaving all the internal stuff unlocked. When waiting for a