similar to: [PATCH] drm/nouveau: kill nouveau_ttm_fault_reserve_notify handler to prevent useless buffer moves

Op 15-07-13 08:05, Ben Skeggs schreef: > On Fri, Jul 12, 2013 at 10:45 PM, Maarten Lankhorst > <maarten.lankhorst at canonical.com> wrote: >> I have no idea what this bogus restriction on placement is, but it breaks decoding 1080p >> VDPAU at boot speed. With this patch applied I only need to bump the vdec clock to >> get real-time 1080p decoding. It prevents a lot of

On Fri, Jul 12, 2013 at 10:45 PM, Maarten Lankhorst <maarten.lankhorst at canonical.com> wrote: > I have no idea what this bogus restriction on placement is, but it breaks decoding 1080p > VDPAU at boot speed. With this patch applied I only need to bump the vdec clock to > get real-time 1080p decoding. It prevents a lot of VRAM <-> VRAM buffer moves. It's not bogus, and is

Op 04-09-13 03:24, Ben Skeggs schreef: > On Mon, Jul 15, 2013 at 6:39 PM, Maarten Lankhorst > <maarten.lankhorst at canonical.com> wrote: >> Op 15-07-13 08:05, Ben Skeggs schreef: >>> On Fri, Jul 12, 2013 at 10:45 PM, Maarten Lankhorst >>> <maarten.lankhorst at canonical.com> wrote: >>>> I have no idea what this bogus restriction on placement

On Mon, Jul 15, 2013 at 6:39 PM, Maarten Lankhorst <maarten.lankhorst at canonical.com> wrote: > Op 15-07-13 08:05, Ben Skeggs schreef: >> On Fri, Jul 12, 2013 at 10:45 PM, Maarten Lankhorst >> <maarten.lankhorst at canonical.com> wrote: >>> I have no idea what this bogus restriction on placement is, but it breaks decoding 1080p >>> VDPAU at boot speed.

From: Maarten Lankhorst <maarten.lankhorst at canonical.com> Commit de7b7d59d54852c introduced tiled GART, but a linear copy is still performed. This may result in errors on eviction, fix it by checking tiling from memtype. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> Cc: stable at vger.kernel.org #3.10+ --- drivers/gpu/drm/nouveau/nouveau_bo.c | 33

https://bugs.freedesktop.org/show_bug.cgi?id=74613 Priority: medium Bug ID: 74613 Assignee: nouveau at lists.freedesktop.org Summary: [v3.14-rc1] [nv34] nouveau: get 0x10000000 put 0x0000ed30 state 0xc0000000 (err: MEM_FAULT) push 0x00000000 QA Contact: xorg-team at lists.x.org Severity: normal

From: Maarten Lankhorst <maarten.lankhorst at canonical.com> Map the GART to the bar and use that mapping, to hide all the tiling details from users. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c | 5 ++++- drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c | 5 ++++- drivers/gpu/drm/nouveau/nouveau_bo.c

--- drivers/gpu/drm/nouveau/nouveau_bo.c | 48 +------- drivers/gpu/drm/nouveau/nouveau_fence.c | 24 +--- drivers/gpu/drm/nouveau/nouveau_fence.h | 2 drivers/gpu/drm/nouveau/nouveau_gem.c | 16 ++- drivers/gpu/drm/qxl/qxl_debugfs.c | 6 + drivers/gpu/drm/qxl/qxl_drv.h | 2 drivers/gpu/drm/qxl/qxl_kms.c | 1

--- drivers/gpu/drm/nouveau/nouveau_bo.c | 48 +------- drivers/gpu/drm/nouveau/nouveau_fence.c | 24 +--- drivers/gpu/drm/nouveau/nouveau_fence.h | 2 drivers/gpu/drm/nouveau/nouveau_gem.c | 16 ++- drivers/gpu/drm/qxl/qxl_debugfs.c | 6 + drivers/gpu/drm/qxl/qxl_drv.h | 2 drivers/gpu/drm/qxl/qxl_kms.c | 1

Dynamically resizing the framebuffer on nv04 was like playing Russian roulette (and it often happened gratuitously) because it seems unable to scan out from buffers above 16MB. This patch splits the mappable VRAM into two chunks when that's the case, and makes the higher one to be used as well when applicable. Signed-off-by: Francisco Jerez <currojerez at riseup.net> ---

- Depth and stencil buffers are supposed to be large enough in general. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 9 ++++----- 1 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index e342a41..9fc4bd6 100644 ---

Hi all! I read that the older Nvidia hardware (maybe < GF8) is in a different driver and no longer maintained. Is that the case? I have a GeForce 4000 MX that I'm trying to get to work on debian/sparc64, which I admit is a bit of longshot, but I was wondering how much effort it would take to even get the driver to build, and then to function. I'm very proficient in C but don't have

I did a very quick pass at removing all the non-KMS support from the DDX. It's tested on G80 but nowhere else currently, I thought some discussion would be a good idea rather than just ripping it out :) The non-KMS paths are messy, and lets face it, rotting badly. IMO the KMS code is stable enough now that we can continue without the UMS crutch, and indeed, the KMS code supports a lot more

Commit a55409066 ("drm/nv50-: map TTM_PL_SYSTEM through a BAR for CPU access") made it possible to work with tiled memory. However mem->mm_node is not a nouveau_mem for AGP-using pre-NV50 cards, but a drm_mm_node, as created by the ttm_bo_manager_func. As such, extend the untiled check to explicitly include all pre-nv50 cards. Reported-by: Ronald <ronald645 at gmail.com>

- In the case of nvbo->head it is really important to avoid an OOPS if ttm_buffer_object_init fails. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 2 ++ drivers/gpu/drm/nouveau/nouveau_channel.c | 1 + drivers/gpu/drm/nouveau/nouveau_object.c | 1 + 3 files changed, 4 insertions(+), 0 deletions(-) diff --git

The T124 generation of Tegra GPUs uses the Kepler architecture and can thus be driven by Nouveau. However, they are declared as platform devices using the Device Tree, and Nouveau has a very strong dependency on PCI. This patch makes Nouveau core able to handle platform devices as well as PCI devices. Commonly-used PCI functions include resource range query and page mapping. These functions are

Hi! Today i received Battlefield 2 and i installed it without any problem, but when laucnhing it it crashes, i use a no-cd crack but i have the same problem. Here's my output: http://pastebin.be/15146 Can someone help me? I really want to play this game! Thanks, kind regards... -------------- next part -------------- An HTML attachment was scrubbed... URL:

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Based on a recent discussion in #radeon, and also my own observation that the 'full' scaling causes no end of confusion among users. See https://bugs.freedesktop.org/show_bug.cgi?id=80868 for some more details, although it is more radeon-specific. Side-note: the scaling mode update handler disallows setting the mode to none

On Tue, Feb 3, 2009 at 3:54 PM, Kasra <kasra_n500 at yahoo.com> wrote: > > I guess the backends could know about the instructions. But I am not convinced why it is beneficial not to have ROR and ROL instructions within llvm. > I guess I could ask you the opposite question: What is the benefit of having these? They would have to be mappable to the source language in some way. I'm

Signed-off-by: Marcin Ko?cielnicki <koriakin at 0x04.net> --- drivers/gpu/drm/nouveau/nv04_graph.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c index 396ee92..d561d77 100644 --- a/drivers/gpu/drm/nouveau/nv04_graph.c +++ b/drivers/gpu/drm/nouveau/nv04_graph.c @@ -543,7 +543,7 @@