similar to: Any LLVM social in India/Asia?

No but we should think of arranging one. On Thu, May 3, 2018, 8:27 PM Jatin Bhateja via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Guys, > > Do we have any LLVM social for India/Asia. > > Wonderful concept to meet fellow community members and have technical > discussion. > > Cheers, > Jatin > _______________________________________________ > LLVM

Other suggestions 1/ Write a separate MI pass to split the macro MI which was generated earlier as a result of ISel to multiple MIs. 2/ Take the decision of splitting later in the pipeling during MC lowering. Decision about when you need to split should be driven by your intent to do any further processing over constituent instruction. ~ Jatin On Fri, Mar 2, 2018 at 8:19 PM, Jatin Bhateja

Seems llvm cannot pass metadata to MachineInstr, or setting operand description in class Instruction and pass to class MachineInstr. Is it a good idea to extend llvm kernel structure to having this feature? Jonathan > On Nov 27, 2017, at 9:01 PM, Jatin Bhateja <jatin.bhateja at gmail.com> wrote: > > SelectionDAGBuilder contained within SelectionDAGISel has a map (NodeMap) b/w

Hello Devs, I am getting following error while connecting to review server. " A Troublesome Encounter! Woe! This request had its journey cut short by unexpected circumstances (Can Not Connect to MySQL)" Is anyone else facing this? Thanks [image: Inline image 1] -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hello Devs, Machine Instruction verifier pass always validates Live variable info associated with MachineInstr along with other checks. Please consider following scenario (w.r.t bugZilla 32583) 1/ MachineCSE pass may prohibit optimising out a common sub-expression for instruction using physical registers by looking at the LiveIn info of successor basic blocks. 2/ Which means we need Live

- Please do not add any more uses of the LiveVariables pass! It is deprecated and only kept around for one last pass that isn't converted. All new code should use LiveIntervalAnalysis! - Kill flags are optional: If they are present they must be correct, but it is legal to have a value die without having a kill flag on the operand. So often a simple fix is to clear out the kill flags from

Hi Nagaraju, Few suggestions split this into following steps. 1/ DAG Legalization : Custom lower the instruction (branch in your case) appropriately in legalization to target specific DAG nodes and glue the nodes together which you want scheduler should schedule together. 2/ Instruction Selection : Define patterns to match the custom DAG nodes. Thus actual decision of creating multiple

Hi All, I am working on a target which requires to generated two instructions for a single branch instruction. ex: imm 1 br r4,0xabcd branch address is 0x1abcd, imm has the upper 16 bits and br has lower 16 bits. Can anyone let me know how to write these kind of patterns in the InstrInfo.td file. Thanks in Advance, Nagaraju

I'd be interested in attending and helping organise the Hyderabad meetup. Cheers Siddharth On Wed 30 May, 2018, 14:32 Siddharth Shankar Swain via llvm-dev, < llvm-dev at lists.llvm.org> wrote: > Hi Folks, > > We are a group of LLVM compiler developers in Hyderabad area. Considering > few previous mail about meetups in India, we are planning to organize LLVM > meetups

I am working on llvm gpu backend. The instruction metadata can only get in IR (class instruction). In DAG stage, the instructions are reordered, so I cannot map the metadata to correct instruction if I cannot access instruction from DAG or MachineInstr structure. > On Nov 26, 2017, at 11:02 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > It might be a more useful to know what

Hi Folks, We are a group of LLVM compiler developers in Hyderabad area. Considering few previous mail about meetups in India, we are planning to organize LLVM meetups in India evry monthly or bimonthly in the best interest of other developers. Based on the concentration of developers Pune, Bangalore and Hyderabad are the location we have in mind. Interested folks please reply stating ur

Hi Hashim, Scalar evolution determines evolution of scalar in terms of expression chain driving it. Try dumping the detailed log using opt -analyze -scalar-evolution <.ll> -S , and look for LoopDispositions corresponding to different expression which shows variance characteristics of a particular expression w.r.t loop i.e. [computable/variant/invariant]. Thanks On Fri, Dec 1, 2017 at

Hi, I am using Scalar Evolution to extract access expressions (for load and store instructions) in terms of the loop induction variables. I observe that the Scalar Evolution analysis is returning more expressions than I expect - including ones that are not defined in terms of the loop induction variable. For instance in the following code: for(unsigned long int bid = 0; bid < no_of_queries;

I am also interested. Best, Andrew On Tuesday, 26 July 2016, 20:36, via llvm-dev <llvm-dev at lists.llvm.org> wrote: Message: 6 Date: Tue, 26 Jul 2016 18:12:48 +0800 From: Raymond Tay via llvm-dev <llvm-dev at lists.llvm.org> To: C Bergström <cbergstrom at pathscale.com> Cc: llvm-dev <llvm-dev at lists.llvm.org>, clang developer list <cfe-dev at

Surprised to know that backward compatibility is not honored across the tools. (i.e. you can read old .bc but NOT old .ll files) Supporting latter is more useful, IMO, because then I wouldn't have to modify all my sources. And who are "we" here? On Fri, Aug 12, 2016 at 7:21 PM, Tim Northover <t.p.northover at gmail.com> wrote: > On 12 August 2016 at 06:42, Madhur

Hi, For my input file I think that llvm-as is encoding an instruction incorrectly. Is there any way to dump the numerical representation of input textual LLVM IR on terminal? "-f" option to llvm-as did not help. -- *Disclaimer: Views, concerns, thoughts, questions, ideas expressed in this mail are of my own and my employer has no take in it. * Thank You. Madhur D. Amilkanthwar

I will as well be interested in attending the meetup (in Hyderabad). IMHO we can start with Meetup and select a city. How are Meetups expenses generally handled elsewhere ? Regards,Pankaj Date: Wed, 30 May 2018 14:59:21 +0530 From: Madhur Amilkanthwar via llvm-dev <llvm-dev at lists.llvm.org> To: Siddharth Bhat <siddu.druid at gmail.com> Cc: Siddharth Shankar Swain <h2015096 at

Hi, How does LLVM identify induction variables of a loop? Is the algorithm based on SSA graphs? I have a complicated loop and I need to do some analysis around it. Can anyone please point me to source of identification part? -- *Disclaimer: Views, concerns, thoughts, questions, ideas expressed in this mail are of my own and my employer has no take in it. * Thank You. Madhur D. Amilkanthwar

Well, I was hinting at LLVM_DEBUG messages. You can pretty much dump all "actions" Tablegen would take to process a .td file, which should suffice, IMO. On Wed, Aug 5, 2020 at 5:59 PM Paul C. Anagnostopoulos <paul at windfall.com> wrote: > Your reply suggests that there is a way to see debug messages from > TableGen. Is that what you meant? If so, can you explain how that

Madhur Amilkanthwar via llvm-dev <llvm-dev at lists.llvm.org>於 2020年8月9日 週日，上午1:53寫道： > Hi Paul, > I hope you have gone through > https://llvm.org/docs/Contributing.html#how-to-submit-a-patch. > > Generally, I would do 'git add' on the new file. 'git diff' should show me > the newly added file. Further, I'd just do 'arc diff' and this should