similar to: Why do constant SD nodes not set the IROrder?

Updating the subject line. From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Gautam Chakrabarti via llvm-dev Sent: Wednesday, March 28, 2018 11:58 PM To: LLVM Dev <llvm-dev at lists.llvm.org> Subject: [llvm-dev] Why do constant SD nodes not set the IROrder? Specifically I would like to understand why ConstantSDNode and ConstantFPSDNode do not set the IR ordering like

I'm trying to match a ConstantFPSDNode == 0 in dag pattern for tablegen but am having some issues. So LLVM doesn't seem to accept a floating point constant literal match like: %v = call <4 x float> @foo(i32 15, float %s, float 0.0, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0) ret <4 x float> %v def : XXXPat<(v4f32 (int_foo i32:$mask, f32:$s, 0,

Hi All, I'm trying to compile the attached code(gdb11531.c) with latest clang with -O0 on ARM. Clang seems to be reordering the instructions in case of constant nodes(for ARM) even when O0 is specified resulting in few wrong information when debugging through GDB. I had few queries,would be great if someone could clarify the same - In the given assembly code, the instructions where constant

The Identifiers section in the LLVM language manual states: "The "\01" prefix can be used on global variables to suppress mangling." Is this for global variables only, or global values in general, such as functions also? In implementation LLVM seems to have this behavior of suppressing mangling even for functions and aliases. Thanks, Gautam

Hi again, It's partially done. My concern is that it won't be accepted as is because of adding the flag parameter in a lot of places. I'd like to show what it looks like (here, not on llvm-commit yet), maybe someone could suggest a better way. There are two sources of the flag: field of TargetOptions and function attribute. I had to add the later one for InstCombine pass. Still

Gautam Sewani wrote: > On Fri, Mar 13, 2009 at 2:38 PM, Duncan Sands <baldrick at free.fr> wrote: > >> Hi, the versions of llvm-gcc and llvm you are using are >> not synchronized. Probably one is from subversion while >> the other is not. >> I've run into this, too. The problem is that the inliner pass uses a 30 bit integer to store the inline

On Fri, Mar 13, 2009 at 2:38 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi, the versions of llvm-gcc and llvm you are using are > not synchronized. Probably one is from subversion while > the other is not. > > Ciao, > > Duncan. > Ok, I 'synchronized' both of them, but now I am getting a different error. On running make, the output ends with the

Hi, Regarding my gsoc proposal (xen in a box), I have developed a set of scripts to create a custom CentOS ISO which delivers Xen 4.4 stack on CentOS 6.6 with libvirt and fully bridge network settings. I have used xen scripts for networking settings. Waiting for feedback. scripts: https://github.com/gautammaloo/centos-xen proposal:

The attached patch contains: - Cleanups in the DAGCombiner.cpp ROTL/ROTR combine code, primarily helping me to fix 80col violations (benefiting the code as a whole). - Detect sign/zext/any-extended versions of ROTL/ROTR patterns. - Allow custom lowering for ROTL/ROTR (needed in the CellSPU's case for 8-bit rotates, when only 16-bit and 32-bit rotates are actually implemented in the

Thanks Jon, it worked, I was able to build all the packages for xenserver on CentOS 6.6 final version. Here is the package list: https://gist.github.com/gautammaloo/7616cccbe8f5c85c196e I was wondering what packages would be necessary to use Xen with xapi, I already have xen with xl installed. Could we have a package like http://packages.ubuntu.com/precise/xcp-xe with which we can have

Hello All, the patch below adds a target lowering hook to state that the target supports (or not) floating point exception behavior. The patch is small and contains one possible use for the hook (folding potentially exception raising fp operations). Any comments? Thanks Pedro -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: opensource1.txt

On Wed, May 20, 2009 at 5:26 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: >> Can you explain why you chose the approach of using a new pass? >> I pictured removing LegalizeDAG's type legalization code would >> mostly consist of finding all the places that use TLI.getTypeAction

I assume you meant to ask for ports that *don’t* support floating point exceptions. To my knowledge, neither R600 nor NVPTX support floating point exceptions. —Owen > On Aug 8, 2014, at 2:41 PM, Eric Christopher <echristo at gmail.com> wrote: > > There's a lot of cut and paste in those routines. Can you do something > to unify it a bit? Also, do we have any ports that

On Tue, Oct 11, 2016 at 2:48 PM, Chris Lattner <clattner at apple.com> wrote: > On Oct 11, 2016, at 12:04 AM, Peter Collingbourne <peter at pcc.me.uk> wrote: > > I have been experimenting with a number of approaches to representation in >> SDAG, and I have found one that seems to work best, and would be the least >> intrusive (unfortunately most approaches to this

On Mon, Oct 10, 2016 at 8:31 PM, Chris Lattner <clattner at apple.com> wrote: > > On Oct 10, 2016, at 8:12 PM, Peter Collingbourne via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hi all, > > I wanted to summarise some discussion on llvm-commits [0,1] as an RFC, as > I felt it demanded wider circulation. > > Our support for references to absolute

----- Original Message ----- > From: "Dmitry Antipov" <antipov at dev.rtsoft.ru> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "Renato Golin" <renato.golin at linaro.org>, llvmdev at cs.uiuc.edu > Sent: Thursday, April 4, 2013 3:22:05 AM > Subject: Is r174746 broken on ARM? > > Hello Hal, > > I have a strong suspicion

On 04/04/2013 05:09 PM, Hal Finkel wrote: > Looking briefly at the code in comment 5 of PR15581, is that the pre-decrement case? > I can't test that case on PPC, so I can certainly believe that there is a problem somewhere. > The relevant code is a little farther down: > > APInt OV = > cast<ConstantSDNode>(Offset)->getAPIntValue(); > if (AM ==

Is it possible to get a register number to which the value is allocated to in MIPS in DAGToDAG class? More Specifically: SDValue Reg3 = Node->getOperand(3); if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Reg3)) { op3 = cast<RegisterSDNode>(Reg3)->getReg();

Hi all, I wanted to summarise some discussion on llvm-commits [0,1] as an RFC, as I felt it demanded wider circulation. Our support for references to absolute symbols is not very good. The symbol will be resolved accurately in non-PIC code, but suboptimally: the symbol reference cannot currently appear as the immediate operand of an instruction, and the code generator cannot make any assumptions

On Mar 13, 2009, at 10:45 PM, Gautam Sewani wrote: > On Fri, Mar 13, 2009 at 8:09 PM, John Criswell > <criswell at cs.uiuc.edu> wrote: >> Gautam Sewani wrote: >>> On Fri, Mar 13, 2009 at 2:38 PM, Duncan Sands <baldrick at free.fr> >>> wrote: >>> >>>> Hi, the versions of llvm-gcc and llvm you are using are >>>> not