similar to: [RFC] Stop giving a default CPU to the LTO plugin?

On 3/15/2018 9:43 AM, Peter Smith via llvm-dev wrote: > Hello everyone, this is most likely Arm specific, but could affect > other targets where there is a somewhat complex relationship between > the triple and mcpu option. > > At present when clang is used as a linker driver for the gold-plugin > and when using and an explicit -mcpu is not given to clang, then clang > will

Thanks for the example, that is very useful in working out the overall scope of the problem, which is now wider than I thought it was. I've put some comments inline. On 15 March 2018 at 19:12, Friedman, Eli <efriedma at codeaurora.org> wrote: > On 3/15/2018 9:43 AM, Peter Smith via llvm-dev wrote: >> >> Hello everyone, this is most likely Arm specific, but could affect

On 16 March 2018 at 10:38, Peter Smith via llvm-dev <llvm-dev at lists.llvm.org> wrote: > On 15 March 2018 at 19:12, Friedman, Eli <efriedma at codeaurora.org> wrote: >> Having ARMv7a instructions in an ARMv4t file shouldn't be a problem: a >> function should be allowed to override the CPU attributes to generate code >> for a newer target. This is generally

On 08/02/13 14:42, Renato Golin wrote: [...] > Can you paste the result of a "clang -v -mcpu=CPU file.c" on your box? I > want to see what are the arguments and the assembler/linker it's > choosing to use. What CPU are we talking about? The box itself is an Allwinner A10; armv7l. /proc/cpuinfo says it's got swp half thumb fastmult vfp edsp neon vfpv3. I've been

On 8 February 2013 14:28, David Given <dg at cowlark.com> wrote: > Debian's clang packages are totally broken on armhf --- the compiler > emits a confused warning about the platform being unrecognised, and then > generates softfloat code --- so I was wondering about LLVM itself. I'm using Ubuntu on Pandas and Chromebooks and LLVM itself behaves well, with the right set of

On 8 February 2013 21:42, David Given <dg at cowlark.com> wrote: > The box itself is an Allwinner A10; armv7l. /proc/cpuinfo says it's got > swp half thumb fastmult vfp edsp neon vfpv3. > Yes, it's a Cortex-A8. I've been unable to find any values for CPU which are accepted (it just > says 'unknown target CPU'. I've tried arm, armv7, armv7a, armv7l,

Renato Golin wrote: [...] > Try setting armv7a-unknown-linux-gnueabihf and see if it works better. No, that doesn't work either. [...] > JIT was never the forte of ARM and I haven't tried yet, but I doubt > it'll be any Debian misconfiguration. The whole architecture > configuration is a bit odd... Debian's clang packages are totally broken on armhf --- the compiler

On 11/05/12 04:56, 陳韋任 wrote: >> I've just filed PR12794: Add ARM cpu / subtarget features auto-detection. And I would very much appreciate the community's help to implement this. >> >> What motivated this? Well this: >> http://www.phoronix.com/scan.php?page=news_item&px=MTA5OTM >> >> I believe one of the reason the benchmark numbers are totally

Dear Anton, Thank you again for your help! I tried with the following options (adding --with-cpu=arm7tdmi and using binutils from cvs snapshot): ../llvm-gcc4.2-2.6.source/configure --prefix=/usr/local/cross-llvm-gcc-arm-elf-4.2-2.6 --program-prefix=llvm- --enable-llvm=/Users/dummy/Develop/llvm/llvm-build --enable-languages=c,c++ --host=i686-apple-darwin9 --build=i686-apple-darwin9

Dear ML, Anton, Thank you for your answer and your help. I had a look at ARM.td of LLVM 2.6 (in lib/Target/ARM..) where I found following definitions: // V4T Processors. def : ProcNoItin<"arm7tdmi", [ArchV4T]>; def : ProcNoItin<"arm7tdmi-s", [ArchV4T]>; def : ProcNoItin<"arm710t", [ArchV4T]>; def :

On May 11, 2012, at 12:25 AM, James Molloy wrote: > On 11/05/12 04:56, 陳韋任 wrote: >>> I've just filed PR12794: Add ARM cpu / subtarget features auto-detection. And I would very much appreciate the community's help to implement this. >>> >>> What motivated this? Well this: >>> http://www.phoronix.com/scan.php?page=news_item&px=MTA5OTM

Hello, Pazzo > Any clue? Yes. Sorry, my fault - next time I should check ARM docs before replying. ARM7TDMI is ARMv4T and this is not supported by LLVM (LLVM does v5+ codegen). -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

That's right. In your example, if the target isn't specified anywhere, an llc invocation would be equivalent to "llc -mtriple=x86_64-unknown-linux-gnu -mcpu=generic". TTI queries (in e.g., CodeGenPrepare) would be based on this. From opt, if the target triple is left unspecified, we will use the "base" TTI implementation (not x86). -- Matt On Wed, Nov 30, 2016 at 2:07

Well how about as a strawman... taking some options from http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores and http://en.wikipedia.org/wiki/List_of_applications_of_ARM_cores LLVM Supports: ARMv4T -> ARM7TDMI ARMv5TE -> ARM926EJ-S -> XScale ARMv6 -> ARM1136J(F)-S ARMv6ZK -> ARM1176JZ(F)-S ARMv7A -> Cortex-A8 Cortex-A9 ARMv7M -> Cortex-M3

On 26 November 2013 16:44, Renato Golin <renato.golin at linaro.org> wrote: > On 26 November 2013 15:36, Rob Stewart <robstewart57 at gmail.com> wrote: >> >> $ clang -v -target armv7a-linux-eabi -mcpu=cortex-a9 -mfloat-abi=soft >> -mfpu=neon helloworld.c > > Hi Rod, I'm honoured. (But Rob is also OK) :-) > You need cross-binutils installed on your

Hello, I'm trying to do the following and encountering problems with the generated arm assembly code: I've got an application in two parts that i've compiled into llvm bitcode using: llvm-gcc -emit-llvm -c part1.c -o part1.bc llvm-gcc -emit-llvm -c part2.c -o part2.bc Then I link them together: llvm-ld part1.bc part2.bc -o combined.bc Now I use the ARM backend via llc to

Hi all, I was wondering if there is a defined ABI for passing vector as parameter for ARM target. For instance is this valid to write .ll statement like: ; ModuleID = 'bugconv.ll' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32" target triple = "thumbv7-none-linux-androideabi" define

Hi all, I've just filed PR12794: Add ARM cpu / subtarget features auto-detection. And I would very much appreciate the community's help to implement this. What motivated this? Well this: http://www.phoronix.com/scan.php?page=news_item&px=MTA5OTM I believe one of the reason the benchmark numbers are totally bogus is that the compilation are done on ARM hosts. Given the benchmarks are

Hi Duncan, I also thought it was a bug, especially since it worked with LLVM 3.0, but since it is not defined by ABI, I was not sure if I need to submit it as a BUG. I wanted to be sure that it is an actual BUG before submitting it and got the not-a-bug answer. Here is a small example to reproduce the problem I'm experiencing: ; ModuleID = 'bugparam.ll' target datalayout =

Hi, I’ve run into a case where `llc -mattr=+soft-float` for "armv7-unknown-linux-androideabi” segfaults, while `llc -float-abi=soft` does not. Similarly if the "target-features"="+soft-float” metadata is embedded, llc segfaults. I fear I’m missing something rather subtle here, could someone help me understand the differences? Cheers, Moritz