similar to: Llvm support for non-power-of-2-sized vectors

On Aug 13, 2013, at 9:09 AM, Sriram Murali <sriram87 at gmail.com> wrote: > Hi Nadav, I believe the implementation to keep on widening the vector to the next power of two must be in TargetLowering.h because that is where we decide whether to Widen the vector or not, and the size to which we widen it. The decision on which legalization kind to do is implemented in TargetLowering.h. The

Hi Nadav, I believe the implementation to keep on widening the vector to the next power of two must be in TargetLowering.h because that is where we decide whether to Widen the vector or not, and the size to which we widen it. In this case, we stop at 4xi8 and do not check if it is legal or not. But the comment says ‘try to widen vector elements until a legal type is found’. Also, there is a

Please tell me whether the following implementation is correct..... My target supports 64 bit mask means immediate(0-2^63) I have implemented it but i dont know whether its correct or not. Please see the changes below that i have made in x86isellowering.cpp static SDValue lower2048BitVectorShuffle(const SDLoc &DL, ArrayRef<int> Mask, MVT VT,

On Wed, May 20, 2009 at 5:26 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: >> Can you explain why you chose the approach of using a new pass? >> I pictured removing LegalizeDAG's type legalization code would >> mostly consist of finding all the places that use TLI.getTypeAction

This post is related to the following post http://lists.llvm.org/pipermail/llvm-dev/2016-April/098823.html I'm still trying to compile a library with clang. But now I'm getting as assert in lib/CodeGen/TargetLoweringBase.cpp:1155: virtual llvm::EVT llvm::TargetLoweringBase::getSetCCResultType(llvm::LLVMContext&, llvm::EVT) const: Assertion `!VT.isVector() && "No default

Hmmm, a quick look at the documentation for TargetTransformInfo doesn't look like it. In LegalizeDAG.cpp it uses TLI.getOperationAction() to find out if an SDNode should be expanded by the legalizer or passed down to the target. That's what I need to know, but I need it in a pass pre-legalization. This seems like weird layering, though. Having an "optimization" pass be looking

Another way to do this would to be to have a reset virtual function which is passed the Function, and the address of TLI so that it could be modified. This seems somewhat cleaner. The reset virtual function would be added to base class TargetLoweringBase. On 03/22/2013 09:22 AM, reed kotler wrote: > For being able to change subtargets within a compilation unit, among > other things, I

For being able to change subtargets within a compilation unit, among other things, I need to be able to change the target lowering class that is used by BasicTTI For example we have a mips16 and non mips16 version. On the original call that creates this class, I'd like to pass the address of the address of the TargetLoweringBase class. That way I can insert a function pass before this

There is a comment in MachineValueTypes.h in the enum. // If you change this numbering, you must change the values in // ValueTypes.td as well! Other = 0, // This is a non-standard value I don't think the .td include can be fixed easily. Tablegen doesn't support include guards and can only include each file once. Looks like there is a build step that runs

Craig, Ahha, thanks. Even with that info I had to resort to “find-grep” to figure out how it gets #included, Being indirectly included from “include/llvm/IR/Intrinsics.td” isn’t exactly obvious :=(( Would it be possible move the #include into “Target.td” ? Also, in “ValueTypes.td” there is a comment about needing to keep it coordinated With “MahineValueType.h”, but there is no such

Hi Reed, We will need to reconstruct the target machine and the TTI chain when the function attributes change. We currently don't have code for doing that but I suggest that you talk with Bill Wendling about the best way to implement this. Thanks, Nadav On Mar 22, 2013, at 11:30 AM, Reed Kotler <rkotler at mips.com> wrote: > Just realized that BasicTransformInfoClass is an

Just realized that BasicTransformInfoClass is an immutable pass. Not sure how to reconcile this with fact that there will be different answers needed depending on the subtarget. Seems like BasicTansformInfoClass should become a function pass that does not modify anything. On 03/22/2013 09:43 AM, Reed Kotler wrote: > Another way to do this would to be to have a reset virtual function >

Hi Shahid, Thank you so much for your response. You suggested approach is what I am right now using. However, it seems that the overhead is a little bit high because we are introducing two more instructions. I was wondering if there was a cheaper way to do it. Best, Zhi On Mon, May 4, 2015 at 2:12 AM, Shahid, Asghar-ahmad < Asghar-ahmad.Shahid at amd.com> wrote: > Hi Zhi, > >

Dumb question about llvm-tblgen for "XyzGenInstrInfo.inc" If I have a pattern in my dot-td-file like this [(set i32:$dst (add i32:$rs1, i32:$rs2))] The question is where does the token "i32" come from, I don't see any definitions for i1, i8, i16, i32, ... in include/llvm/Target/*.td while I do see definitions for tokens like

Hello, To any out-of-tree targets, please be aware that I intend to commit a patch that will break the build of any target implementing TargetLoweringBase::isFMAFasterThanMulAndAdd, for the reasons described below. (Basically, the current interface definition is broken and not followed, and no in-tree target was doing the right thing with it, so it is unlikely any out-of-tree target is either...)

The i32 class is defined in include/llvm/CodeGen/ValueTypes.td along with a class for every type in MachineValueTypes.h On Wed, May 25, 2016 at 8:12 PM, Marcello Maggioni via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I don’t quite follow why you are doing something like this. > > What is the advantage of this instead of just attaching the AddrRegs > regsister class as the

Hi Peter, I would recommend looking into the implementation of the matcher if you want to add more builtin types: utils/TableGen//DAGISelMatcherGen.cpp That being said, you can define your own types without having to go through that hassle. E.g., from AArch64 def simm9 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= -256 && Imm < 256; }]> { let ParserMatchClass =

I have a target whose calling conventions specify that pointer-typed arguments are passed in different registers than same-sized integers. It appears that in the SelectionDAGBuilder, arguments/formals with pointer type are lowered to the corresponding integer MVT (via this path: SelectionDAGISel::LowerArguments llvm::ComputeValueVTs TargetLoweringBase::getValueType

Hi, I am working on a 64bit architecture where only 'i64' is valid (no hardware floating point support) and I am triggering a 'Promote may not follow Expand or Promote' assertion failure. (TargetLowering.h : getTypeConversion) When I look into it, I see that the conversion fails because llvm tries to convert a 'f32' into a 'i32' through a TypeSoftenFloat. As i32

So I have dual mode 16/32 compilation on a per function basis working. I need to clean up some things and then will push the change. I managed to do everything without needing to change anything in target independent code thus far. It was a fun puzzle to solve as to how to do this using only the given APIs. As for the BasicTransformInfoPassass, for this dual mode I'm using