similar to: Polly Dependency Analysis in MyPass

Displaying 20 results from an estimated 2000 matches similar to: "Polly Dependency Analysis in MyPass"

2010 Oct 21
2
[LLVMdev] statically linked passes
Hi, I am trying to create a pass that should get statically linked into opt (since I'm on both mac and native win32 and win32 does not support LOADED_MODULEs, at least I get errors while trying to create one). So I have it working with CMake on windows but when I try to run the same code base on mac I get unresolved externals. Here is what I have done so far in the build system: Within
2018 Jan 28
4
Polly Dependency Analysis in MyPass
Hello, I need to analyze dependencies in my llvm ir by using polly. i created a new pass called mypass there i added polly dependency analysis pass but when i execute this pass in gdb i get no data. Why is that so? My code is follows; namespace { struct mypass : public FunctionPass { static char ID; mypass() : FunctionPass(ID) { } virtual bool runOnFunction(Function &F) {
2018 Jan 28
1
Polly Dependency Analysis in MyPass
HI Hameeza, what do mean by link is still missing? Currently it is not possible to use polyhedral information from within in-tree LLVM passes. This is because Polly is not currently part of the LLVM tree, and is only linked into the tools as an external project. I.e., you can't depend on Polly passes in an in-tree pass. What you can do, though, is use Polly from an out-of-tree context. If
2018 Jan 28
0
Polly Dependency Analysis in MyPass
I have modified the code as follows; now i am using both scopdetection and scopinformation before dependency check but i think link is missing... virtual bool runOnFunction(Function &F) { std::unique_ptr<ScopInfo> Result; std::unique_ptr<ScopDetection> Result2; //polly::ScopDetection pl; auto &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo(); auto
2018 Jun 25
2
How to include a opt pass in clang driver
Hello, I have written a pass for the IR and I can run it with opt -load lib/LLVMMyPass.so -mypass -myarguments -S -o output.ll < output.bc I have registered my pass with the following code: static RegisterPass<MyPass> X("mypass", "MyPass Pass (with getAnalysisUsage implemented)"); How do I include the same pass in the clang driver. I tried running the pass: clang
2018 Jan 29
1
Polly Dependency Analysis in MyPass
Thank You. Actually i pass polly canonaclize IR to my new created polly pass called "mypass". Mypass should first detect scops then find depedndencies as the mechanism conventional approach. Now i know how to write llvm pass here i am writing pass as loadable module first afterwards i will integrate it with opt in the end. I tried writing following code. Could you please help me on
2018 Jan 29
0
Polly Dependency Analysis in MyPass
How do you compile the code? Within the Polly subdirectory using CMake? How do you run your pass. Using "opt -mypass inputfile.ll"? Michael 2018-01-28 9:30 GMT-06:00 hameeza ahmed via llvm-dev <llvm-dev at lists.llvm.org>: > Hello, > > I need to analyze dependencies in my llvm ir by using polly. i created a new > pass called mypass there i added polly dependency
2018 Jun 25
2
How to include a opt pass in clang driver
Hi Eli, I have tried that: static void registerMyPass(const PassManagerBuilder &, llvm::legacy::PassManagerBase &PM) { PM.add(new MyPass()); } static RegisterStandardPasses RegisterMyPass(PassManagerBuilder::EP_OptimizerLast, registerMyPass); It still couldn't find my pass. Regards, Soham Sinha PhD Student,
2018 Jan 29
1
Polly loop offloading to Accelerator
Thank You. i used -polly-ast-detect-parallel but there is no coincident info generated; my c code is simple vec-sum as follows; #include <stdio.h> int a[2048], b[2048], c[2048]; foo () { int i; for (i=0; i<2048; i++) { a[i]=b[5] + c[i]; } } i executed following commands; $clang -S -emit-llvm vec-sum.cpp -march=native -O3 -mllvm -disable-llvm-optzns -o vec-sum.s $opt -S
2017 Aug 07
3
VBROADCAST Implementation Issues
Thank You. Still getting errors.I have modified my instructions as you said as follows: def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst, VK64WM:$mask_wb), (ins VR_2048:$src1, VK64WM:$mask, i2048mem:$src2), "GATHER_256B\t{$src2, {$dst} {${mask}}|${dst} {${mask}}, $src2}", [(set VR_2048:$dst, VK64WM:$mask_wb, (v64i32 (masked_gather
2017 Aug 07
2
VBROADCAST Implementation Issues
Hello, I did as you said, Please tell me whether the following correct now?? def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst, _.KRCWM:$mask_wb), (VR_2048:$src1, _.KRCWM:$mask, ins i2048mem:$src2), "GATHER_256B\t{$src2, {$dst}{${mask}}|${dst} {${mask}}, $src2}"), [(set VR_2048:$dst, _.KRCWM:$mask_wb, (v64i32 (GatherNode
2019 Apr 23
5
StringRef Iterator Variable Display
Hello, I want to display the variable names in stringref iterator. But it is not displayed using following code. for (set<StringRef>::iterator sit = L.begin(); sit != L.end(); sit++) { errs() << *sit << " "; } How to do this? Please help.. -------------- next part -------------- An HTML attachment was scrubbed... URL:
2017 Aug 06
2
VBROADCAST Implementation Issues
i want to implement gather for v64i32. i wrote following code. def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst), (ins i2048mem:$src), "GATHER_256B\t{$src, $dst|$dst, $src}", [(set VR_2048:$dst, (v64i32 (masked_gather addr:$src)))], IIC_MOV_MEM>, TA; def: Pat<(v64f32 (masked_gather addr:$src)), (GATHER_256B
2017 Jul 01
2
Jacobi 5 Point Stencil Code not Vectorizing
I am able to vectorize it with the following code; #include <stdio.h> #define N 100351 // This function computes 2D-5 point Jacobi stencil void stencil(int a[][N], int b[][N]) { int i, j, k; for (k = 0; k < N; k++) { for (i = 1; i <= N-2; i++) for (j = 1; j <= N-2; j++) b[i][j] = 0.25 * (a[i][j] + a[i-1][j] + a[i+1][j] + a[i][j-1] + a[i][j+1]); for
2019 Aug 31
3
Usage of the jumptable attribute
Hello everyone, I'm new to LLVM (which is a really great project by the way) and I hope this is the right place for my question. In the LLVM Language Reference Manual I found the "jumptable" function attribute, which seems to be exactly what I need for my project (where I want to add one level of indirection to every function call), but I have trouble figuring out, how to use
2017 Sep 05
2
Issues in Vector Add Instruction Machine Code Emission
I was getting same error when i keep both EVEX/EVEX_4V and TA. So, i restored my original instructions and for that i have to include bool HasTA = TSFlags & X86II::TA; in x86MCCodeEmitter.cpp then used this condition; if(HasTA) ++SrcRegNum; in order to emit binary correctly. Is it right? On Tue, Sep 5, 2017 at 5:45 AM, Craig Topper <craig.topper at gmail.com> wrote: >
2017 Jul 08
5
Error in v64i32 type in x86 backend
Thank You. I have seen the opcode is 8 bits and all the combinations are already used in llvm x86. Now what to do? On Sat, Jul 8, 2017 at 10:57 AM, Craig Topper <craig.topper at gmail.com> wrote: > Yes its an opcode conflict. You'll have to look through Intel documents > and find an unused opcode. I've only added instructions based on a real > spec so I don't know
2017 Sep 05
2
Issues in Vector Add Instruction Machine Code Emission
Thank You, I changed TA to EVEX or EVEX_4V. But now i am getting following error: Invalid prefix! UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:647! On Tue, Sep 5, 2017 at 4:36 AM, Craig Topper <craig.topper at gmail.com> wrote: > Not all instructions can use EVEX_4V. Move instructions in particular > cannot because they don't have 2 sources. >
2017 Jul 01
3
Jacobi 5 Point Stencil Code not Vectorizing
Does it happen due to loop carried dependence? if yes what is the solution to vectorize such codes? please reply. i m waiting. On Jul 1, 2017 12:30 PM, "hameeza ahmed" <hahmed2305 at gmail.com> wrote: > I even tried polly but still my llvm IR does not contain vector > instructions. i used the following command; > > clang -S -emit-llvm stencil.c -march=knl -O3
2017 Jul 14
3
error:Ran out of lanemask bits to represent subregister
Do your 32768 registers also have sub registers? I can't tell you exactly what to change. I'm not familiar with the code. I would just be running grep or something. ~Craig On Fri, Jul 14, 2017 at 10:23 AM, hameeza ahmed <hahmed2305 at gmail.com> wrote: > Thank you so much. I think there is no issue with my definitions since i > have to use larger registers i.e 65536 bit