similar to: Opcodes with 32-bit pair vs 64-bit register

Hi, I'm trying to write an LLVM backend for Epiphany arch, and I wonder if someone can give me some advice on how to implement load/store optimization. The CPU itself is 32-bit, but it supports wider 64-bit loads and store. So the basic idea is to make use of those by combining narrow ones. I've checked how it is done in AArch64 and Hexagon, and my current code is very close to the

Hi, Same here, my backend only has 64bit load/store. But i still use 64bit virt regs and expand/declare missing instructions by myself.  I'll try looking into sparc backend, thanks. Also, only after writing this post I found a bunch of built-in transforms. Still trying to understand how to use those. By the way, constraint-wise (alignment), is there any difference between virt regclass and

I got a qemu crash and errors reported in bochs while trying to get latest core32 branch working (pxelinux): qemu: fatal: Trying to execute code outside RAM or ROM at 0xe6e8aa07 EAX=6e0c7811 EBX=000034b3 ECX=ca68b338 EDX=00000048 ESI=750e3fff EDI=00000020 EBP=d07e4988 ESP=00102324 EIP=e6e8aa07 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES =0028 00000000 ffffffff 00cf9300 CS =0020

liu asked me for some clarification on how intermode calls work on the core32 branch, so I decided that that was probably something that really should be published more widely. This is the *current state* of the core32 branch; all this stuff is subject to change as development progresses: *** Call from real mode (16-bit) to protected mode (32-bit): These calls are done with the pm_call macro:

Well, there is now a development branch in the git repository, which contains the infrastructure needed for rewriting the core in C. As an initial test case it simply contains a "Hello, World!" and a rewrite of rllpack in C. This is not production code in any way: SYSLINUX (the FAT version) is completely broken (I haven't had time to fix the installers yet) and the Linux kernel