similar to: Adding comments to 'MachineInstruction'

When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a comment that appears in the generated assembly with '-S -fverbose-asm'. There is a large set of 'add*' functions to attach additional information to the MI, but I don't see one for adding comments. Is there a method I can call to attach an arbitrary string

There is no generic mechanism as far as I know. You can look at AsmPrinter.cpp/emitComments() to see what situations trigger comments at the moment. - Matthias > On Feb 3, 2018, at 4:40 AM, Martin J. O'Riordan via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a

> On Jan 16, 2018, at 11:31 PM, Martin J. O'Riordan <MartinO at theheart.ie> wrote: > > Thanks Matthias, > > I have both a pre-RA and a post-RA scheduler, and I had thought that I could track “has RA happened?” by setting a flag in my pre-RA scheduler as it completes - my suspicion (which you have confirmed) was that “#vregs == 0” was not a safe assumption. What I

Thanks Matthias, I have both a pre-RA and a post-RA scheduler, and I had thought that I could track “has RA happened?” by setting a flag in my pre-RA scheduler as it completes - my suspicion (which you have confirmed) was that “#vregs == 0” was not a safe assumption. What I cannot be sure of, is what passes execute after my pre-RA scheduler but before RA, and what passes execute after RA but

Yes, it looks like passing ‘EnableVec’ and ‘EnableSLPVec’ to ‘Args.hasFlag’ should be replaced with ‘false’ and then it has the expected behaviour. MartinO From: cfe-dev [mailto:cfe-dev-bounces at lists.llvm.org] On Behalf Of Martin J. O'Riordan via cfe-dev Sent: 01 March 2018 18:02 To: 'Richard Smith' <richard at metafoo.co.uk> Cc: 'Clang Dev'

There's always the hypothetical template<typename T> llvm::Triple giveMeATripleDamnYou(const T &); Just keep adding implementations until you stop needing to. ;-) Cheers. Tim. On 1 January 2018 at 17:00, Martin J. O'Riordan <MartinO at theheart.ie> wrote: > Thanks Tim, > > Sometimes my hacks last longer than I want as it isn't always apparent how I can

Hi Martin, On Fri, 3 Aug 2018 at 14:10, Martin J. O'Riordan <MartinO at theheart.ie> wrote: > $ git branch --list > * master > martino By default "git branch" only lists local branches. "git branch -a" will list all of them, including (for me) "remotes/origin/release_70". If you just type "git checkout release_70" git will

Thanks Tim, Sometimes my hacks last longer than I want as it isn't always apparent how I can implement it properly. At the moment I am looking at changes I need to 'MachineBasicBlock::ReplaceUsesOfBlockWith'. It is most likely that I need to handle the issue in a different way, but the change I need works here for my target for the time being, but breaks X86 which I also build for

Hi David, When I use CMake to configure, ‘zlib’ and its header are detected - I build on CentOS 6.5 or CentOS 7. Since I run CMake from the command-line, I tried added ‘-DLLVM_ENABLE_ZLIB=0’ and ‘-DLLVM_ENABLE_ZLIB=1’ (using ‘-DLLVM_ENABLE_ZLIB=ON’ does not seem to work). Both ‘clang’ and ‘llvm-profdata’ (and all other tools and utilities) are configured and built together, in any event,

Please don't rely on this for checking whether regalloc was run: You can have functions without vregs pre-RA[1]. We don't need or should track state such as pre/post-RA as part of the function. Instead it really is a property of where a pass was scheduled, so the pass should know and not the function. I'd recommend simply creating a pre-RA and a post-RA pass instead of scheduling the

Yes, if it is in the interface it would make more sense to have a null implementation at the very least. In my out-of-tree target, I also removed them from the interface if the build was for Release to ensure that I got compile-time errors to reveal other places I might have otherwise missed. All the best, MartinO -----Original Message----- From: Dibyendu Majumdar [mailto:mobile at

Martin: It sounds like you are doing is more akin to shuffle selection than fusion and therefore it's a better fit for instruction selection than DAGCombining. Try movign it to <Target>ISelDAGToDAG's Select (or potentially PreprocessISelDAG). Th -Nirav On Tue, Mar 6, 2018 at 4:05 PM Martin J. O'Riordan <MartinO at theheart.ie> wrote: > We discovered what is

Thanks very much Eric for taking the time to carefully explain this to me. So if I am the author of the backend for a new processor technology, or willing to modernise my existing implementation, you would recommend that the ‘-mcpu’ option is deprecated and probably best not used at all, or perhaps just as a synonym for ‘-march + -mtune’? The first part of the target triple guides the

Hi Martin, On 25 September 2017 at 20:35, Martin J. O'Riordan <MartinO at theheart.ie> wrote: > Are you building a Debug or Release version of the compiler? It seems that in Release builds of LLVM 5.0 the dump() implementation is absent, although the method is available in the interface. This is plain wrong in my view. If the dump() has to be removed then it should not be present

We discovered what is happening. SDAGCombiner essentially looks at various combinations of nodes to do with vectors, and when it can, it creates a vector shuffle. The problem is, that our vector shuffle lowering builds new trees with vector element, or vector sub-vector insert sequences. The generic DAGCombiner, reconstructs these into a new shuffle, and so the loop continues - we reduce it,

Hi Martin On 25 September 2017 at 21:13, Martin J. O'Riordan <MartinO at theheart.ie> wrote: > Yes, if it is in the interface it would make more sense to have a null implementation at the very least. In my out-of-tree target, I also removed them from the interface if the build was for Release to ensure that I got compile-time errors to reveal other places I might have otherwise

Cool this is better than I expected - I never thought about the YAML support. And the document reference is really very good. Thanks Francis, MartinO -----Original Message----- From: Francis Visoiu Mistrih [mailto:francisvm at yahoo.com] Sent: 05 February 2018 21:43 To: Martin J. O'Riordan <MartinO at theheart.ie> Cc: LLVM Developers <llvm-dev at lists.llvm.org>; Adam Nemet

Hi Serge, Thanks for your help. I have looked at the change log, and so far as I can tell, my implementation is pretty much identical to all of the in-tree targets, but I’m missing something and can’t see what it is. I have simplified my TD description to just: def MyCallseqStart : SDNode<"ISD::CALLSEQ_START", SDCallSeqStart<[SDTCisVT<0, i32>,

Sorry, my reply “to all” left out LLVM-Dev From: Martin J. O'Riordan [mailto:MartinO at theheart.ie] Sent: 04 April 2018 16:41 To: 'David Blaikie' <dblaikie at gmail.com>; 'mcrosier at codeaurora.org' <mcrosier at codeaurora.org>; 'Chandler Carruth' <chandlerc at gmail.com>; 'Eric Christopher' <echristo at gmail.com> Subject: RE:

Hi Martin, On Tue, Mar 20, 2018 at 1:18 PM Martin J. O'Riordan <MartinO at theheart.ie> wrote: > Thanks Eric, > > > > After the original reply to my query I had a good look at the GCC > documentation for these options, and what I discovered is that “there is no > consensus” in GCC. Basically, saying do what GCC does was a non-answer as > it clarified nothing.