similar to: [inline-asm][asm-goto] Supporting "asm goto" in inline assembly

Linux kernel is using the “asm goto” feature, other projects probably use it as well. I think it provides motivation to support it in LLVM. Regarding the complexity, I believe there is some infrastructure that we can at least partially reuse (the support for “indirectbr” instruction). My focus is adding “asm goto” support, the other things are indeed completely orthogonal and came up in bugs

Asm goto feature was introduces to GCC in order to optimize the support for tracepoints in Linux kernel (it can be used for other things that do nop patching). GCC documentation describes their motivating example here: https://gcc.gnu.org/onlinedocs/gcc-4.8.4/gcc/Extended-Asm.html #define TRACE1(NUM) \ do { \

On Tue, Apr 4, 2017 at 6:07 AM Yatsina, Marina via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Asm goto feature was introduces to GCC in order to optimize the support > for tracepoints in Linux kernel (it can be used for other things that do > nop patching). > > > > GCC documentation describes their motivating example here: > > >

My two cents: - I think inline assembly should work even if the compiler cannot parse the contents. This would rule out msvc inline assembly (or alternatively put all the parsing and interpretation burden on the frontend), but would work with gcc asm goto which specifies possible targets separately. - Supporting control flow in inline assembly by allowing jumps out of an assembly block seems

Microsoft assembler treats mov to EAX as a register, even if there is a global memory also named EAX – meaning the register takes precedence. But here I have a bit of a different situation – I have a global variable, which name happens to match an implicit register or a register that does not exist in the current arch, just in future ones. Microsoft assembler treats these cases as memory

Some targets don't have the problem because they prefix all names with an undercore. Apart from that I am not aware of any solution to the problem of keywords clashing with variable names in intel syntax. - Matthias > On Jul 23, 2015, at 9:18 AM, Reid Kleckner <rnk at google.com> wrote: > > So, there is no prior art for escaping the name of a global symbol with the same name

So, there is no prior art for escaping the name of a global symbol with the same name as a register? If there is, I'd rather we just implement it and leave it at that. We can probably fix the 'flags' case easily in LLVM, but I'd rather not bend over backwards to make ZMM0 be a global name when AVX is disabled. On Thu, Jul 23, 2015 at 9:12 AM, Yatsina, Marina <marina.yatsina at

Hi all, I've encountered an issue with x86 Intel asm syntax when using certain variable names. If you look at the following example, where I try to do a mov to a memory location named "flags2", llvm- mc works fine: >cat test_good.s mov eax, flags2 >llvm-mc.exe -x86-asm-syntax=intel test_good.s -o - .text movl flags2, %eax But if the memory location is

Suppose I have a global variable named 'EAX'. How do Intel assemblers normally escape register names to access such a global variable? On Thu, Jul 23, 2015 at 1:42 AM, Yatsina, Marina <marina.yatsina at intel.com> wrote: > Hi all, > > > > I’ve encountered an issue with x86 Intel asm syntax when using certain > variable names. > > > > If you look at

On Tue, 2017-04-04 at 16:26 +0000, Chandler Carruth via llvm-dev wrote: > On Tue, Apr 4, 2017 at 6:07 AM Yatsina, Marina via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Asm goto feature was introduces to GCC in order to optimize the > > support for tracepoints in Linux kernel (it can be used for other > > things that do nop patching). > >   > > GCC

> On Apr 4, 2017, at 11:44 AM, John McCall via llvm-dev <llvm-dev at lists.llvm.org> wrote: > >> On Apr 4, 2017, at 2:12 PM, Matthias Braun <matze at braunis.de <mailto:matze at braunis.de>> wrote: >> My two cents: >> >> - I think inline assembly should work even if the compiler cannot parse the contents. This would rule out msvc inline assembly

FYI there is now serious talk of the Linux kernel dropping support for compilers that *don't* support asm goto. On Tue, 2017-04-04 at 13:13 -0700, Matthias Braun via llvm-dev wrote: > > > On Apr 4, 2017, at 11:44 AM, John McCall via llvm-dev > > ts.llvm.org> wrote: > > > > > On Apr 4, 2017, at 2:12 PM, Matthias Braun <matze at braunis.de> > >

Hi, What is the best way to model a scheduler for a VLIW in-order architecture? I've looked at the Hexagon and R600 architectures and they are using itineraries. I wanted to understand the benefit in using itineraries over the per operand scheduling. I also found this thread from almost 2 years ago: http://lists.llvm.org/pipermail/llvm-dev/2016-April/098763.html At that time it seemed the

> On Feb 4, 2018, at 9:15 AM, Yatsina, Marina via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > What is the best way to model a scheduler for a VLIW in-order architecture? > I’ve looked at the Hexagon and R600 architectures and they are using itineraries. I wanted to understand the benefit in using itineraries over the per operand scheduling. > > I

Hi Rotem, Thank to you, and especially to Marina! The problem gone. I'm a bit interested, what is the reason it worked in Win7, and not in Win8. I've recently used Process Explorer to discover, that the call was to ntdll.dll, which in Win8 is loaded to the totally different address. Best regards, Victor Milovanov Moscow State University graduate student 2012/3/3 Rotem, Nadav

Hi, Takumi! I tried your patch, and it did not help. Moreover, I tried to compile under Windows 7 and copy files to Windows 8, and received the same exception. So the problem seems to be in Windows 8 itself or some non-portable code inside LLVM. Could anyone tell me what LLVM code in ExecutionEngine is responsible for allocating and protecting memory for generated native functions? Best

Hi Krzysztof, 2018-02-08 13:32 GMT+08:00 Andrew Trick via llvm-dev < llvm-dev at lists.llvm.org>: > > > On Feb 4, 2018, at 9:15 AM, Yatsina, Marina via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hi, > > What is the best way to model a scheduler for a VLIW in-order architecture? > I’ve looked at the Hexagon and R600 architectures and they are using

Hi Victor, Try this fix by Marina Yatsina: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120220/137532.html Nadav -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of lost Sent: Friday, March 02, 2012 22:53 To: NAKAMURA Takumi; LLVM Subject: Re: [LLVMdev] Access Violation using ExecutionEngine on 64-bit Windows 8

Is goto from inline asm supported in LLVM 2.8 ? I am searching for something similar to what gcc 4.5 does: http://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Extended%20asm%20with%20goto http://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Extended%20asm%20with%20goto which allows jumping from inline assembly to a label defined in C. I want to jump from inline asm to a basic block in LLVM.

We have a two different dimensions for each instruction: slot assignments, and operand timings. These two are unrelated to each other, and also each (or both) can change for any given instruction from one architecture version to the next. The main concern for us was which of these mechanisms contains all the information that we need. We cannot express all the scheduling details by hand, and