similar to: similar instructions with disjoint register files

Hi Lang, While working on improving the debug dumps of the PBQP graphs, I found out that we can have some edges between nodes which belong to totally disjoint register classes (for example, on AArch64, this would be an int and a floating point register). Although it is true those 2 registers interferes, in the sense they are alive at the same time, they never have any physical interference,

I have been looking through the LLVM documentation, and I have decided that I would be interested in producing a functional front-end for it, if only to determine how applicable the optimizations that it already performs are to such a language. However, I have run into one obstacle that would make it difficult to write many of the things I would like to do. Is there a way to represent a

Specifically what I am asking is, if I have a computer named ralph$ who is uidNumber 678 in ou=Computers and I have a user who is uidNumber 678 in ou=People, will this cause problems? Must the different sets of uidNumbers be disjoint acrossed different ou's?

Hello, Is there any way I can use the gregexpr functions (or a different function) in a manner that will also return overlapping (i.e. non disjoint) regular expressions? For instance, when running gregexpr("AAA","AAAAAA"), I get two matches, one at position 1 and one at position 4. I'd like to receive 4 matches at positions 1, 2, 3 and 4. Thanks, Schraga

Hi Jakob, >> Say I have regclass1 with reg A, and regclass2 with regs {A, B}, but >> regclass2 defines only "B" as allocatable by RA. > > The register allocator assumes in many places that a register is > either allocatable or reserved independently of the register class. Is there any reason for this? I mean, the methods for allowing one physical reg be

Hi Clemens, On 02/02/12 14:25, Clemens Hammacher wrote: > On 2/2/12 1:51 PM, Duncan Sands wrote: ... >> what do you mean by "copied over to the main module"? If you want to add >> additional IR to the main module then you should link it in using the linker. > > I think that the linker would indeed be able to remap the types correctly, but > the main obstacle here

Hi , I need to use ntlm_auth across two different AD domains and their is no trust between the 2 domains. I followed the post http://samba-multiple-domains.blogspot.co.uk/2010/03/how-to-join-one-linux-box-to-two.html <https://deref-mail.com/mail/client/44YIgEylY9w/dereferrer/?redirectUrl=http%3A%2F%2Fsamba-multiple-domains.blogspot.co.uk%2F2010%2F03%2Fhow-to-join-one-linux-box-to-two.html>

Dear All: We have been experiencing networking issues so I don't know if this got through; I can't see it in the archive. My sincere apologies if this appears twice. I may have found an unusual bug and am posting here to see if anyone can reproduce it on their system. First of all, sessionInfo(): > sessionInfo() R version 2.7.1 (2008-06-23) i386-apple-darwin8.10.1 locale:

Hi Clemens, On 02/02/12 13:30, Clemens Hammacher wrote: > Hi Chris, > thanks for your answer! > > On 2/2/12 1:15 AM, Chris Lattner wrote: >> The linker has to solve the exact same problem (read multiple .bc files and >> unify types across them). This is the impetus behind TypeMapTy in >> lib/Linker/LinkModules.cpp. You'll probably need to do something like that.

On Jan 31, 2012, at 6:16 AM, Clemens Hammacher wrote: > This is because each module contains its own type table with all the types used in that module. When reading in the corresponding bitcode, the BitcodeReader explicitly calls StructType::create, without looking up in the context whether an equivalent type (even with the same name) already exists. > So I think that llvm is behaving

On 2/2/12 2:32 PM, Duncan Sands wrote: > On 02/02/12 14:25, Clemens Hammacher wrote: >> On 2/2/12 1:51 PM, Duncan Sands wrote: > ... >>> what do you mean by "copied over to the main module"? If you want to add >>> additional IR to the main module then you should link it in using the >>> linker. >> >> I think that the linker would indeed

On 2/2/12 1:51 PM, Duncan Sands wrote: > On 02/02/12 13:30, Clemens Hammacher wrote: >> On 2/2/12 1:15 AM, Chris Lattner wrote: >>> I have to ask: why are you writing these modules out as separate bc files? >> >> I knew that someone would ask that ;) >> We need to have separate modules during runtime. One of them contains the code >> that is actually JIT

Hi Chris, thanks for your answer! On 2/2/12 1:15 AM, Chris Lattner wrote: > The linker has to solve the exact same problem (read multiple .bc files and unify types across them). This is the impetus behind TypeMapTy in lib/Linker/LinkModules.cpp. You'll probably need to do something like that. I already looked into that. The linker is using the GlobalValues of both modules to identify

Hi all I have a samba 3.0.21c with OpenLDAP 2.3.19 , as PDC where almost 200 Workstations in the domain, most of my workstations are windows xp, & 2000 professional. but sometimes some of the system get disjoint from the domain, if we do ipconfig/flushdns and ipconfig/registerdns and wait for 5 min, and reboot and login, it logs on, ie it doesn't complain that computer is not in the

> > We did something like this back when the register allocator couldn't split > live ranges. > Yes, I remember the isWinToJoinCrossClass() function, removed here: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?r1=152016&r2=155551&diff_format=h that prevented some coalescing to the cost of leaving many unnecessary copies around for very

Dear community, we are currently facing a problem related to the new type system in llvm 3.0. Our setting is the following: We have two or more modules, all in the same LLVMContext. They are sharing some types, meaning that for example functions in different modules are referencing the same (meaning pointer identical) type. Now we write the different modules to the disk, and read them back

On Jan 7, 2013, at 4:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Hello Jakob, > > Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? It's not likely I'll have time to look at this in the near future. I'd recommend you do it yourself. /jakob > 2012/12/19 Borja Ferrer <borja.ferav at gmail.com>

Hello Jakob, Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? Thanks! 2012/12/19 Borja Ferrer <borja.ferav at gmail.com> > We did something like this back when the register allocator couldn't split >> live ranges. >> > > Yes, I remember the isWinToJoinCrossClass() function, removed here: > >

Ok, I've found that marking tiny live intervals as not spillable inside VirtRegAuxInfo::CalculateWeightAndHint is not playing nicely with very constrained regclasses, in my case a regclass composed of only one register. As a workaround, instead of marking them as not spillable, I've marked them with a very high spill cost and the regalloc is able to compile the function with good code

On Dec 19, 2012, at 8:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Hello Jakob, > > I think I've found something interesting that may help you get a better idea of what's going on. > > While looking at the debug info I noticed that the coalescer was removing lots of copies that could help the allocator make more cross class copies. As a test, I disabled