similar to: [RFC] Turn the MachineOutliner on by default in AArch64 under -Oz

Displaying 20 results from an estimated 9000 matches similar to: "[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz"

2018 Apr 23
0
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
On 4/20/2018 7:06 PM, Jessica Paquette via llvm-dev wrote: > We perform regular testing to ensure the outliner produces correct > AArch64 code at -Oz. Tests include the LLVM test suite and standard > external test suites such as SPEC. All tests compile and > execute. We've also been making sure that the outliner produces > debuggable code. Users are still guaranteed to have
2018 Apr 23
3
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
Hi Eli, > I just tried some tests, and I'm seeing a bunch of failures on SPEC at -O3; looks like mostly crashes at runtime. I can try to reduce a testcase if you need it. If you could do that, that would be great. Our testing has been primarily for -Oz and -O2, so I haven’t looked at -O3 at all. > I don't think this is really the right approach. With LTO, you can have a mix of
2018 Apr 23
0
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
I just ran SPEC at -O3 with the outliner enabled for AArch64 and didn’t get any failures on my end. Which flags did you use? I’m curious about what’s going on here... I used -O3 -mllvm -enable-machine-outliner -arch arm64. - Jessica > On Apr 23, 2018, at 1:41 PM, Jessica Paquette <jpaquette at apple.com> wrote: > > Hi Eli, > >> I just tried some tests, and I'm
2018 Apr 23
2
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
Sorry, I was using a modified compiler, which by coincidence made the bug much easier to reproduce. In some rare cases, the compiler will use x30 as a general-purpose register; in that case, outlining breaks because the "ret" branches to the wrong address.  Testcase (reproduce with "clang -O3 --target=aarch64-pc-linux-gnu -mllvm -enable-machine-outliner"): extern long g1;
2018 Apr 26
0
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
Hi, On 25 April 2018 at 14:02, David Green via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Hello > > A 4.4% geomean codesize improvement is really impressive. That stuff is hard to come by, you usually have to nibble away at it bit at a time. I ran some codesize benchmarks we have and they were in the same ballpark. Some of these are quite small so had less opportunity for
2018 Apr 25
5
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
Hello A 4.4% geomean codesize improvement is really impressive. That stuff is hard to come by, you usually have to nibble away at it bit at a time. I ran some codesize benchmarks we have and they were in the same ballpark. Some of these are quite small so had less opportunity for outlining, but the average was still over 3% with some as high as 9-10%. All the tests I ran were fine, although we
2017 Jul 20
8
[RFC] Add IR level interprocedural outliner for code size.
I’m River and I’m a compiler engineer at PlayStation. Recently, I’ve been working on an interprocedural outlining (code folding) pass for code size improvement at the IR level. We hit a couple of use cases that the current code size solutions didn’t handle well enough. Outlining is one of the avenues that seemed potentially beneficial. -- Algorithmic Approach -- The general implementation can be
2017 Jul 25
5
[RFC] Add IR level interprocedural outliner for code size.
> On Jul 25, 2017, at 9:24 AM, Jessica Paquette <jpaquette at apple.com> wrote: > >> The two passes are pretty different in their approaches to congruency finding, so I don't think it helps to group them as though they were interchangeable "outliner technology". The two passes might be totally orthogonal. > > I think that based off how River described his
2016 Aug 26
10
[RFC] Interprocedural MIR-level outlining pass
Hi everyone, Since I haven't said anything on the mailing list before, a quick introduction. I'm an intern at Apple, and over the summer I implemented a prototype for an outlining pass for code size in LLVM. Now I'm seeking to eventually upstream it. I have the preliminary code on GitHub right now, but it's still very prototypical (see the code section).
2018 Apr 24
0
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
Thanks for reducing that for me! The outliner pulls out the following: OUTLINED_FUNCTION_0: // @OUTLINED_FUNCTION_0 .cfi_sections .debug_frame .cfi_startproc // %bb.0: adrp x29, g1 add x29, x29, :lo12:g1 adrp x30, g2 // This adrp shouldn’t have been outlined. ret It shouldn’t be pulling out that adrp. There’s a special case for arps in
2017 Jul 25
3
[RFC] Add IR level interprocedural outliner for code size.
On Mon, Jul 24, 2017 at 4:14 PM, Quentin Colombet via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi River, > > On Jul 24, 2017, at 2:36 PM, River Riddle <riddleriver at gmail.com> wrote: > > Hi Quentin, > I appreciate the feedback. When I reference the cost of Target Hooks it's > mainly for maintainability and cost on a target author. We want to keep the
2016 Aug 26
2
[RFC] Interprocedural MIR-level outlining pass
I think the "Motivation" section explained that. I too first thought about "why not at IR?" but the reason looks like MIR, post-RA has the most accurate heuristics (best way to know looks like actually getting there). Do you know if there is any experimental pass that relies on deriving heuristics by a feedback loop after letting, ie. a duplicate module/function/block continue
2017 Jul 21
2
[RFC] Add IR level interprocedural outliner for code size.
Hi Evgeny, I know of the current machine outliner in LLVM. If you look in the "More detailed performance data" in the end section it includes performance comparisons to the machine outliner. As for the algorithmic approach they are kind of similar. Machine Outliner: - Builds a suffix tree based on identical equivalence between machine instrs. - Uses target specific cost model for
2017 Jul 24
2
[RFC] Add IR level interprocedural outliner for code size.
Hi Quentin, I understand your points and I believe that some meaning is being lost via email. For performance it's true that that cost isn't necessarily modeled, there is currently only support for using profile data to avoid mitigate that. I was working under the assumption, possibly incorrectly, that at Oz we favor small code over anything else including runtime performance. This is
2018 Apr 26
2
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
> Porting the outliner on ARM is in my plans for this year (as discussed > with other ARM folks at EuroLLVM last week), to avoid duplication is > it ok for you if I work on it, David, Jessica ? Sounds good to me; an ARM target would be great! - Jessica > On Apr 26, 2018, at 2:17 AM, Yvan Roux <yvan.roux at linaro.org> wrote: > > Hi, > > On 25 April 2018 at
2017 Jul 24
4
[RFC] Add IR level interprocedural outliner for code size.
Hi Quentin, I appreciate the feedback. When I reference the cost of Target Hooks it's mainly for maintainability and cost on a target author. We want to keep the intrusion into target information minimized. The heuristics used for the outliner are the same used by any other IR level pass seeking target information, i.e TTI for the most part. I can see where you are coming from with
2020 Mar 24
2
[RFC][AArch64] Homogeneous Prolog and Epilog for Size Optimization
Hi Vedant, Thanks for your interest and comment. Size-optimization improves page-faults and a start-up time for a large application, which this enabling also followed. Even though I didn't see a large regression/complaint on a CPU-bound case, which is not a typical case for mobile workload, I wanted to be precautious of enabling it by default. However, as with default outlining case, I
2019 Jan 15
2
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz
Hi Yvan, On Mon, 5 Nov 2018 at 10:11, Yvan Roux via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Yes, I'll submit an RFC soon, my prototype works fine but I still have > a couple issues to tackle (some Thumb1 corner cases, PIC code > generation, ...) and enhance the testsuite. Any news on this? I'm starting to look into 32-bit ARM outlining too and could probably help
2016 Aug 26
2
[RFC] Interprocedural MIR-level outlining pass
Hi, I let Jessica give more details but here are some insights. MIR offers a straight forward way to model benefits, because we know which instructions we remove and which one we add and there are no overhead of setting up parameters. Indeed, since the coloring will be the same between the different outlining candidates, the call is just a jump somewhere else. We do not have to worry about the
2017 Jul 25
6
[RFC] Add IR level interprocedural outliner for code size.
Hi River, Thanks for the detailed explanation. If people are okay for you to move forward, like I said to Andrey, I won’t oppose. I feel sad we have to split our effort on outlining technology, but I certainly don’t pretend to know what is best! The bottom line is if people are happy with that going in, the conversation on the details can continue in parallel. > On Jul 24, 2017, at 4:56 PM,