similar to: Adding DebugLoc to machine instructions generated from InlineAsm constants

Displaying 20 results from an estimated 10000 matches similar to: "Adding DebugLoc to machine instructions generated from InlineAsm constants"

2011 Nov 09
0
[LLVMdev] Start column from DebugLoc of MachineInstr
Hi,   1. Below code gives me end column number of the machine instruction.    How can I get the start column number ?   const MachineInstr *First; ..... //First is assigned. DebugLoc MIDB = First->getDebugLoc(); col_begin  = MIDB.getCol();   2. -----------------   If my C block is     {         int t = 10;      }   This gives me value 20, instead of 9. -----------------   3. In DebugLoc the
2013 Oct 21
0
[LLVMdev] Instruction Emitter crash when emitting glued InlineAsm SDNode
Hi, I'm getting an Instruction emitter crash when emitting an INLINEASM SDNode that is Glued to other nodes. The crash happens at line 808 of file llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp: const MCInstrDesc &MCID = TII->get(F->getMachineOpcode()); with the assertion: assert(isMachineOpcode() && "Not a MachineInstr opcode!"); I'm not a great expert
2010 Sep 07
1
[LLVMdev] help converting llvm metadata into dwarf tags
hi Devang and thanks for the tips, i finally managed to fit all the pieces together into something that seems to work. It's probably not the best (or even correct!) way of doing it but here's a brief overview for reference: An instruction in the LLVM IR gets converted into an SDNode in the DAG then later into a MachineInstr. I'd already attached my own MDNodes to IR instructions I
2016 Oct 29
1
Problems with Inline ASM expressions generated in the back end
Hello. I generated in the back end by hand (in C++ code, not with TableGen) some fancy assembly code using Inline ASM expressions and if I use 2 functions in my source code (but NOT just 1 function; I will not present the functions, but each requires me to generate an Inline ASM expression) I get this error at compilation (at scheduling): BB#0: derived from LLVM BB %entry
2010 Aug 24
0
[LLVMdev] help converting llvm metadata into dwarf tags
Hi Roger, On Mon, Aug 23, 2010 at 4:01 PM, Roger Wang <innit42 at gmail.com> wrote: > Dear all, > > I'd like to find the memory location of certain instructions in a > compiled/linked binary. During the IR phase, I tag instructions I'm > interested in with LLVM'-2.7's new metadata (MDNodes with an identifiable > ID). I'd now like to propagate that data
2018 Aug 07
3
[RFC] Add DebugLoc parameter in Instruction’s Create() functions
Many DI-related bugs are caused by missing Debug Location in an instruction created in a transformation. Most of the time the fix is trivial once you found where the culprit instruction is created (https://reviews.llvm.org/D50263). Currently, when you create a new Instruction, in order to give it DL you have to either use an IRBuilder that is previously set to the correct DL or “manually” create
2018 Mar 16
0
Mapping InlineAsm parameters to ConstraintInfoVector elements
Could you provide an example where MSan checks an output parameter? On Fri, Mar 16, 2018 at 9:53 AM, Alexander Potapenko via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Hi all, > > I'm trying to figure out which parameters of a given InlineAsm instruction > are its inputs, and which are the outputs (rationale: make sure MSan > doesn't check the output parameters of
2018 Mar 16
2
Mapping InlineAsm parameters to ConstraintInfoVector elements
Hi all, I'm trying to figure out which parameters of a given InlineAsm instruction are its inputs, and which are the outputs (rationale: make sure MSan doesn't check the output parameters of an asm() statement). As far as I understand, this information is only available through the ConstraintInfoVector for the InlineAsm. However there's no exact match between the constraints and the
2012 Apr 05
1
[LLVMdev] Metadata for MachineInstr
Hi all, Just a quick question about passing information all the way down to machine code level. Metadata provides an excellent vehicle to pass extra ad-hoc information along the compilation pipeline. However, If I understand correctly, it seems that MachineInstr does not support metadata, by which I mean metadata cannot be attached to MachineInstr's by now. Metadata can be bundled with
2015 Nov 22
2
BuildMI crashes on a certain probability on the exact same test
Dear there, I'm trying to call BuildMI in my backend to add a machineinstr. BuildMI(MBB, I, I->getDebugLoc(), TII->get(Vanilla::MOV), Vanilla::R1).addReg(MI->getOperand(1).getReg()); But it gives me an error like this: 0 clang 0x000000010e61a56e llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 46 1 clang 0x000000010e61c209
2013 Mar 11
1
[LLVMdev] Question about InlineAsm
Hello, I'm new with the llvm, and I trying to write a transformation adding some lines of asm to a code. My code is like this, Type *VoidTy = llvm::Type::getVoidTy(getGlobalContext()); llvm::FunctionType *ty = llvm::FunctionType::get(VoidTy, false); InlineAsm *iv = InlineAsm::get( ty, "mov $55, %eax", "", true ); // <----- here SmallVector<llvm::Value*,
2016 Jul 21
2
InlineAsm and allocation to wrong register for indirect access
Hi, I am seeing a case, in a private port, of an inline asm with indirect memory references being allocated invalid registers (i.e. registers that cannot be used on loads). For example, the inline asm constraint is correct: call void asm sideeffect "MOV $$r0, $0\0AMOV $$r0, $1\0A", "*m,*m,~{r0}"(i16* @a, i16* %b) #1, !srcloc !1 but then $0 and $1 are allocated to registers
2009 Jul 31
3
[LLVMdev] RFC: MachineInstr Annotations
I'm getting to the point where I want to contribute some more MachineInstr comment support for things like spills. As we've discussed before, we don't have all of the information available in AsmPrinter to synthesize the kind of comments that can be helpful for debugging performance issues with register allocators (our primary use for these kinds of comments). In order to get this
2020 Feb 27
3
How to set DebugLoc when using IRBuilder's CreateCall ?
Hi I want to insert some functions into the llvm bitcode ir files. So I use IRBuilder and CreateCall(). But it how error : inlinable function call in a function with debug info must have a !dbg location. I don't know what DebugLoc should I give the new CallInst to setDebugLoc. I Create this CallInst , so this CallInst doesn't hava so-called "DebugLoc" mapping to the source
2013 Feb 15
2
[LLVMdev] build a machine instruction by itself
On 02/15/2013 03:07 PM, Jakob Stoklund Olesen wrote: > On Feb 15, 2013, at 1:21 PM, Reed Kotler <rkotler at mips.com> wrote: > >> I want to have some functions that create machine instructions, not specifying which machine function or basic block or iterator they are part of. > All machine instructions must be created by a machine function. It provides the context for memory
2013 Feb 16
0
[LLVMdev] build a machine instruction by itself
I ended up settling on a scheme which I'm not completely happy with but it's the best I can see to do. const MCInstrDesc& AddiuSpImm(int64_t Imm) const; and then if (isInt<16>(-Remainder)) BuildMI(MBB, I, DL, AddiuSpImm(-Remainder)).addImm(-Remainder); So the AddiuSpImm choses which instruction description to use depending on the immediate value and then
2009 Aug 01
0
[LLVMdev] RFC: MachineInstr Annotations
On Jul 31, 2009, at 11:17 AM, David Greene wrote: > I'm getting to the point where I want to contribute some more > MachineInstr comment support for things like spills. As we've > discussed before, we don't have all of the information available > in AsmPrinter to synthesize the kind of comments that can be > helpful for debugging performance issues with register
2010 Feb 03
1
[LLVMdev] MI.getNumOperands() < MI.getDesc().getNumOperands()
With a modified copy of LLVM (so it's probably my fault) I'm getting an assertion failure because isTwoAddrUse (in TwoAddressInstructionPass.cpp) is being called with a MachineInstr MI such that MI.getNumOperands() is 2, but MI.getDesc().getNumOperands() is 5. The assertion fails when that function calls MI.getOperand(2). My question is: is isTwoAddrUse doing the right thing here? static
2009 Jul 13
0
[LLVMdev] [PATCH] Support asm comment output
On Jul 13, 2009, at 11:29 AM, David Greene wrote: > On Monday 13 July 2009 13:13, Chris Lattner wrote: > >>> We're not going to submit our line number stuff anyway (it's too >>> much of a >>> hack) but we would like the comment infrastructure to be there. >> >> DebugLoc is there. The transition isn't complete at the LLVM IR >> level,
2009 Jul 13
0
[LLVMdev] [PATCH] Support asm comment output
On Monday 13 July 2009 13:29, David Greene wrote: > I forgot about the LLVM instruction information. That's something that > can't be synthesized by the asmprinter. Again, we only emit some of this > with special debug flags so we don't carry the original IR around in > comments all the time. :) If the FI question can be answered (how do we know it's a spill slot)?