similar to: -speculative-execution moving load before store

Displaying 20 results from an estimated 2000 matches similar to: "-speculative-execution moving load before store"

2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
Hi, On 03/30/2016 11:38 AM, Matt Arsenault wrote: > >> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com >> <mailto:mikael.holmen at ericsson.com>> wrote: >> >> i16 (divm16_pseudo …) >> >> stuff? >> >> I've tried >> (i16, i16 (divm16_pseudo i16:$src1, i16:$src2) >> and >> ((i16, i16)
2014 Aug 15
3
[LLVMdev] Physical register definition removed by MachineCSE
Hi, My target has a special configuration register that many instructions read implicitly, configuring for example if an add instruction should saturate at over/underflow or not. Now, I have a problem where the MachineCSE removes a setting of this configuration register in a basic block, because MachineCSE::isPhysDefTriviallyDead can't find any uses of it in the basic block where
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
On 03/30/2016 11:51 AM, Matt Arsenault wrote: > >> On Mar 30, 2016, at 11:43, Mikael Holmén <mikael.holmen at ericsson.com> wrote: >> >> Hi, >> >> On 03/30/2016 11:38 AM, Matt Arsenault wrote: >>> >>>> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com >>>> <mailto:mikael.holmen at
2016 Mar 30
0
Instruction selection pattern for intrinsic returning llvm_any_ty
> On Mar 30, 2016, at 11:43, Mikael Holmén <mikael.holmen at ericsson.com> wrote: > > Hi, > > On 03/30/2016 11:38 AM, Matt Arsenault wrote: >> >>> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com >>> <mailto:mikael.holmen at ericsson.com>> wrote: >>> >>> i16 (divm16_pseudo …) >>>
2019 Jul 15
2
DirectoryWatcher causing build failures on Redhat linux with kernel version 2.6.32
On 07/15/2019 04:01 AM, Mikael Holmén via llvm-dev wrote: > Hi, > > Same thing for me, as I described here: > > http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20190708/279184.html > > I think the problem is that the patch assumes that if sys/inotify.h > exists, then IN_EXCL_UNLINK is defined in it. > > But I think that there are old versions of inotify.h
2017 Oct 09
11
Is llvm.org down?
Looks like I can't access git, documentation, bugs... I'm not sure if this email will actually go through. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171009/e63b709a/attachment.html>
2017 Feb 27
8
Noisy benchmark results?
Hi, I'm trying to run the benchmark suite: http://llvm.org/docs/TestingGuide.html#test-suite-quickstart I'm doing it the lnt way, as described at: http://llvm.org/docs/lnt/quickstart.html I don't know what to expect but the results seems to be quite noisy and unstable. E.g I've done two runs on two different commits that only differ by a space in CODE_OWNERS.txt on my 12
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
Hi, On 03/30/2016 11:15 AM, Matt Arsenault wrote: > >> On Mar 30, 2016, at 09:33, Mikael Holmén via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hi, >> >> On my out-of-tree target I have an intrinsic >> >> def int_phx_divm_u16 : Intrinsic<[llvm_any_ty], >> [llvm_i16_ty, llvm_i16_ty], >>
2019 Nov 28
3
Instcombine and bitcast of vector. Wrong CHECKs in cast.ll, miscompile in instcombine?
Hi, In llvm/test/Transforms/InstCombine/cast.ll there is a test like this: target datalayout = "E-p:64:64:64-p1:32:32:32-p2:64:64:64-p3:64:64:64- a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64- v64:64:64-v128:128:128-n8:16:32:64" [...] define <3 x i32> @test60(<4 x i32> %call4) { ; CHECK-LABEL: @test60( ; CHECK-NEXT: [[P10:%.*]] = shufflevector
2015 Aug 10
2
load instruction erroneously removed by GVN
Hi, On 08/07/2015 10:30 PM, Nick Lewycky wrote: [...] > Depends. What is the exact declaration of format_long? > > > In the input .ll file it is: > > ; Function Attrs: minsize optsize > define internal i16 @format_long(i16* %res.8.par, i16 %base.9.par, > i32 %x.10.par) #3 { > > which is later changed somewhere in opt to: > > ;
2017 Jun 27
4
Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
Hi Quentin and llvm-dev, I've got a regalloc-related question that you might have an opinion or answer about. In our out-of-tree target we've been doing some bundling before register allocation for quite some time now, and last night a new problem popped up. What the fix should be depends on if this bundle is legal or not: BUNDLE %vreg39<imp-def,dead> *
2017 Nov 08
2
Is it ok to allocate > half of address space?
Many thanks for the pointer! I missed that bug report since the title was about GVN. If there's interest in supporting this feature I can help since we've formalized most of BasicAA. I can easily verify if proposed changes are correct. (I'll release the code soon). Nuno Quoting Björn Pettersson A <bjorn.a.pettersson at ericsson.com>: > Hi Nuno. > I can't
2015 Aug 07
3
load instruction erroneously removed by GVN
On 08/07/2015 01:53 PM, Caldarale, Charles R wrote: >> From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] >> On Behalf Of Mikael Holmén via llvm-dev >> Subject: [llvm-dev] load instruction erroneously removed by GVN > >> But between the load and the alloca there is also >> call fastcc void @format_long(i16* %_tmp30, i16 10, i32 10), !dbg !22 >>
2016 Jul 08
3
Running verify between every opt pass?
Hi, Is there any easy way to run the verifier between each pass in opt if I do e.g. opt -O3 foo.ll -o foo.opt.ll ? If I add -verify after -O3 I get one invocation of the verifier first in the FunctionPass manager and then get two (!) runs of the verifier after all other passes are run. Then I saw the flag -verify-each which sounds promising, the help text says - Verify after each
2016 Mar 30
0
Instruction selection pattern for intrinsic returning llvm_any_ty
> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com> wrote: > > i16 (divm16_pseudo …) > > stuff? > > I've tried > (i16, i16 (divm16_pseudo i16:$src1, i16:$src2) > and > ((i16, i16) (divm16_pseudo i16:$src1, i16:$src2) > and a few other variants without managing to get it through. > > Thanks again, > Mikael Are you
2016 Jan 25
1
Return value from TargetLowering::LowerOperation?
Hi, On 01/22/2016 05:02 PM, Tom Stellard wrote: > On Fri, Jan 22, 2016 at 01:58:49PM +0100, Mikael Holmén via llvm-dev wrote: >> Hi, >> >> I'm a litle bit puzzled by the TargetLowering::LowerOperation function, >> and what different callers of this function assumes about the returned >> value. >> > SelectionDAGLegalize::LegalizeOp() is your best
2017 Sep 20
1
Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
On Wed, Sep 20, 2017 at 1:43 AM, Mikael Holmén <mikael.holmen at ericsson.com> wrote: > I also think it's weird that the replaceDbgDeclareForAlloca/rep > laceDbgDeclare/FindAllocaDbgDeclare methods return as soon as they've > handled one found dbg.declare, so if there are several, one is moved next > to the alloca, but the other ones are left somewhere. So maybe a fault
2016 Feb 08
2
LoopIdiomRegognize vs Preserved
Hi, I'm having problems with the LoopIdiomRegognizer crashing on me with An asserting value handle still pointed to this value! UNREACHABLE executed at ../lib/IR/Value.cpp:695! If I remove AU.addPreserved<LoopInfoWrapperPass>(); or AU.addPreserved<AAResultsWrapperPass>(); everything goes well. The C-code triggering this is void foo(int a[10][10]) { int i, j,
2016 Jan 22
3
Return value from TargetLowering::LowerOperation?
Hi, I'm a litle bit puzzled by the TargetLowering::LowerOperation function, and what different callers of this function assumes about the returned value. In several places it seems like it is assumed that LowerOperation can return three kinds of values: * Something completely new. * SDValue() * The same SDValue as LowerOperation was called on. However in some places, e.g. in
2019 Oct 23
2
[cfe-dev] [Openmp-dev] GitHub Migration Starting Now
On Tue, 2019-10-22 at 09:57 -0700, Tom Stellard via cfe-dev wrote: > On 10/22/2019 09:08 AM, Tom Stellard via Openmp-dev wrote: > > Hi, > > > > We're getting ready to start migrating to GitHub. SVN will be > > moved to read-only now and we'll > > begin the process of turning on GitHub commit access. I'll send an > > email when we're done.