Displaying 20 results from an estimated 3000 matches similar to: "[ARM/Thumb] Make a function in arm while in Thumb triple"
2012 Jul 18
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 15:24, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> I'm not sure how to interpret the above output, but I don't understand
> why if say -triple armv4t-none--gnueabi .
Ok, we're getting there... ;)
I think these errors are due to Clang not finding the
libraries/includes/etc for the target you're building.
If you have
2013 Oct 15
2
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi Andrea,
That is because the LR is the fixed register as per the
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
and out_char() function is not the leaf function ,Hence compiler
tends to save and restore the LR and the save and restore of
register r11 is to align stack for 8 bytes as per ARM EABI.
Thanks
~Umesh
On Tuesday, October 15, 2013, Umesh Kalappa
2012 Jul 18
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 14:57, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> $ clang -march=armv7-m -mfloat-abi=soft -ccc-host-triple
> armv7m-none-gnueabi testReference.cpp -c
> fatal error: error in backend: CPU: 'cortex-m3' does not support ARM
> mode execution!
Ah, yes! Try:
$ clang -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c
Cross
2015 Dec 30
2
Substitute instruction with a jump to a library code
I'm trying to find a way to emulate a floating point instruction, say a
floating point add. My understanding is that in order to do that I need to
execute
setOperationAction(ISD::FADD, (MVT::f32, Expand);
setOperationAction(ISD::FADD, (MVT::f64, Expand);
in MyTargetISelLowering.cpp, MyTargetLowering::MyTargetLowering(...).
However for some reason I'm still seeing a floating point add in
2013 Feb 08
0
[LLVMdev] JIT on armhf
On 8 February 2013 14:28, David Given <dg at cowlark.com> wrote:
> Debian's clang packages are totally broken on armhf --- the compiler
> emits a confused warning about the platform being unrecognised, and then
> generates softfloat code --- so I was wondering about LLVM itself.
I'm using Ubuntu on Pandas and Chromebooks and LLVM itself behaves well,
with the right set of
2010 Jan 10
1
[LLVMdev] building a llvm-arm-elf crosscompiler on OSX 10.5
Dear ML,
Anton, Thank you for your answer and your help.
I had a look at ARM.td of LLVM 2.6 (in lib/Target/ARM..) where I found
following definitions:
// V4T Processors.
def : ProcNoItin<"arm7tdmi", [ArchV4T]>;
def : ProcNoItin<"arm7tdmi-s", [ArchV4T]>;
def : ProcNoItin<"arm710t", [ArchV4T]>;
def :
2012 Jun 28
3
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello list
I think I really finally found a way to crossbuild a binary for ARM using
Clang/llvm.
This message would be a documentation for someone who may concern for the
same issue with me.
- Target : TOSHIBA AC100 / Ubuntu 12.04 (https://wiki.ubuntu.com/ARM/**
TEGRA/AC100 <https://wiki.ubuntu.com/ARM/TEGRA/AC100>)
- Host : i386 Desktop PC / Ubuntu 12.04
- Toolchain on host : sudo
2013 Feb 08
6
[LLVMdev] JIT on armhf
Renato Golin wrote:
[...]
> Try setting armv7a-unknown-linux-gnueabihf and see if it works better.
No, that doesn't work either.
[...]
> JIT was never the forte of ARM and I haven't tried yet, but I doubt
> it'll be any Debian misconfiguration. The whole architecture
> configuration is a bit odd...
Debian's clang packages are totally broken on armhf --- the compiler
2011 May 16
2
[LLVMdev] [Patch] Let MC/ELF generate Thumb/Thumb-2 are properly
On 11-05-16 09:21 AM, Koan-Sin Tan wrote:
> splited patches and test cases
>
> mc-elf-thumbfunction-bit.diff: for 1
> mc-elf-arm-backend-bl-blx-sign-bit.diff: for 2.
> mc-elf-thumb-bl-blx-relocation-table-entry.diff: for 3.
> mc-elf-cpu-xscale-attributes.diff: for 4.
>
> elf-thumbfunc.s: test case for 1
> elf-thumbfunc-reloc.ll: test case for 2 and 3
>
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
Umesh,
Makes some sort of sense to me, OTOH:
If instead of choosing r11 as a "dummy" to align the stack we had chosen
some other register in the range r0-r7 then we could have emitted the PUSH
encoding T1 (2 bytes opcode) as opposed to the encoding T2 (which is a 4
bytes opcode).
A
On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>wrote:
> Hi
2011 May 17
0
[LLVMdev] [Patch] Let MC/ELF generate Thumb/Thumb-2 are properly
On Tue, May 17, 2011 at 12:29 AM, Rafael Avila de Espindola
<rafael.espindola at gmail.com> wrote:
> On 11-05-16 09:21 AM, Koan-Sin Tan wrote:
>>
>> splited patches and test cases
>>
>> mc-elf-thumbfunction-bit.diff: for 1
>> mc-elf-arm-backend-bl-blx-sign-bit.diff: for 2.
>> mc-elf-thumb-bl-blx-relocation-table-entry.diff: for 3.
>>
2011 May 17
2
[LLVMdev] [Patch] Let MC/ELF generate Thumb/Thumb-2 are properly
> Thanks for the review and checkin.
Thanks for the patch!
> Regarding elf-thumbfunc-reloc.ll, it seems to me that current ARMAsmParser
> doesn't recognize "(PLT)", so something like "bl foo(PLT)" doesn't work
> consequently. And I don't know how to write .s to test this without (PLT).
NP. Can you just add that as a FIXME in elf-thumbfunc-reloc.ll?
2018 Mar 15
2
[RFC] Stop giving a default CPU to the LTO plugin?
Hello everyone, this is most likely Arm specific, but could affect
other targets where there is a somewhat complex relationship between
the triple and mcpu option.
At present when clang is used as a linker driver for the gold-plugin
and when using and an explicit -mcpu is not given to clang, then clang
will always generate a -Wl,-plugin-opt=mcpu=<default CPU> where the
default CPU is based
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Hi,
I do not get your result. Do I miss something?
$COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16
arm.cpp -S -o - -O3
.text
.syntax unified
.eabi_attribute 67, "2.09"
.eabi_attribute 6, 14
.eabi_attribute 7, 65
.eabi_attribute 8, 1
.eabi_attribute 9, 2
.fpu crypto-neon-fp-armv8
.eabi_attribute 12, 4
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Dear list,
git checkout llvmorg-8.0.0 -b llvm8.0
cmake -G "Unix Makefiles" ../llvm-project/llvm -DCMAKE_BUILD_TYPE=Debug
-DLLVM_ENABLE_PROJECTS="clang;lld"
-DLLVM_TARGETS_TO_BUILD="X86;NVPTX;AMDGPU;ARM;AArch64"
[arm.cpp]
#define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \
float16x4x4_t __s1 = __p1; \
__builtin_neon_vst4_lane_v(__p0, __s1.val[0],
2012 Aug 29
0
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hi Journeyer
First, thank you so much for your updates on your experiments.
I am currently following your steps but have found myself stuck with the
following error:
/usr/lib/gcc/arm-linux-gnueabi/4.6/../../../../arm-linux-gnueabi/bin/ld:
this linker was not configured to use sysroots
clang: error: linker command failed with exit code 1 (use -v to see
invocation)
I used the command string you
2012 Jun 19
0
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello
> ./clang -v -emit-llvm -ccc-host-triple arm-none-linux-gnueabi
> -I/home/hum/Documents/Projects/llvm_clang/gnuarm-4.0.2/arm-elf/include
> -L/home/hum/Documents/Projects/llvm_clang/gnuarm-4.0.2/arm-elf/bin hello.c
You forgot about sysroot here.
> /home/hum/Documents/Projects/llvm_clang/gnuarm-4.0.2/arm-elf/bin/ld:
> unrecognised emulation mode: armelf_linux_eabi
>
2017 May 02
2
LLVM module attributes question
I'm trying to find a way to get/set the module attributes as printed in a
module dump:
attributes #0 = { noinline nounwind uwtable
"correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "less-precise-fpmad"="false"
"no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"
2012 Jun 19
2
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello Gergö, Joerg and people on our list
With your kind answer, I tried to build a hello world program for
ARM(arm-none-linux-gnueabi) on my x86-64 PC.
Thank you we verified the generated bitcode. The only thing remained is
linking.
Let me brief what I did so far.
1. Built Clang/llvm in a way explained in
http://clang.llvm.org/get_started.html on Ubuntu 11.10 x86-64 PC
2. Downloaded gcc-4.0
2013 Oct 15
1
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi andrea,
R11 treated as frame pointer at arm backend , which is fixed again .
Thanks
Umesh
On Tuesday, October 15, 2013, Andrea Mucignat <andrea at nestlabs.com> wrote:
> Umesh,
> Makes some sort of sense to me, OTOH:
> If instead of choosing r11 as a "dummy" to align the stack we had chosen
some other register in the range r0-r7 then we could have emitted the PUSH