Displaying 20 results from an estimated 11000 matches similar to: "unsigned operations with negative numbers"
2006 Apr 18
1
[patch] sparc build fix
add object rules so that the division, remainder and friends get
really build on sparc, patch from Fabio M. Di Nitto <fabbione@ubuntu.com>.
reworked to apply on latest git tree.
Signed-off-by: maximilian attems <maks@sternwelten.at>
---
Has been since long in the Debian and Ubuntu klibc.
diff --git a/klibc/arch/sparc/Makefile.inc b/klibc/arch/sparc/Makefile.inc
index
2020 Feb 07
2
Why does FPBinOp(X, undef) -> NaN?
On Fri, Feb 7, 2020 at 12:29 PM Nuno Lopes <nunoplopes at sapo.pt> wrote:
>
> It's not correct (output of Alive2):
>
> define half @fn(half %a) {
> %b = fadd half %a, undef
> ret half %b
> }
> =>
> define half @fn(half %a) {
> ret half undef
> }
> Transformation doesn't verify!
> ERROR: Value mismatch
>
> Example:
> half %a
2018 Sep 25
2
Unsafe floating point operation (FDiv & FRem) in LoopVectorizer
Hi,
Consider the following test case:
int foo(float *A, float *B, float *C, int len, int VSMALL) {
for (int i = 0; i < len; i++)
if (C[i] > VSMALL)
A[i] = B[i] / C[i];
}
In this test the div operation is conditional but llvm is generating unconditional div for this case:
vector.body: ; preds = %vector.body, %vector.ph
%index = phi i64 [
2015 Oct 05
3
RFC: Pass for lowering "non-linear" arithmetics of illegal types
Hi LLVM,
This is my idea I had some time ago, when I realized that LLVM did not
support legalization of some arithmetic instructions like mul i256. I have
implemented very simple and limited version of that in my project. Is it
something LLVM users would appreciate?
1. The pass transforms IR and is meant to be run before CodeGen (after
IR optimizations).
2. The pass replaces
2008 Mar 31
3
[LLVMdev] Reference Manual Clarifications
Here are some clarifications for the reference manual. Please verify
that my assumptions are correct. Shall I post a patch?
Floating-point Constants: Add "The assembler requires the exact decimal
value of a floating-point constant. For example, the assembler accepts
'1.25' but rejects '1.3' because '1.3' is a repeating decimal in binary."
Binary
2014 Apr 24
4
[LLVMdev] Proposal: add intrinsics for safe division
Hi,
I’d like to propose to extend LLVM IR intrinsics set, adding new ones for safe-division. There are intrinsics for detecting overflow errors, like sadd.with.overflow, and the intrinsics I’m proposing will augment this set.
The new intrinsics will return a structure with two elements according to the following rules:
safe.[us]div(x,0) = safe.[us]rem(x,0) = {0, 1}
safe.sdiv(min<T>, -1) =
2010 Mar 12
0
[LLVMdev] Smaller than 32-bit?
Hi Russell-
The PIC16 is an 8-bit target, and the msp430 is a 16-bit target. The rules about the largest supported integer no longer apply as much- for most operations, codegen can now handle arbitrary precision (exceptions: mul, udiv, urem, sdiv, srem). For those five, library calls should be emitted for big integers - best way to check if they're supported is to just try them :)
Alastair
2010 Mar 11
2
[LLVMdev] Smaller than 32-bit?
Does LLVM support any target platforms on which the natural integer
size/pointer size is smaller than 32 bits? For example, I noticed
mention of PIC16, is that such a platform?
If so, does the usual rule about the largest supported integer being
the size of two pointers still apply? So that on that platform you
can't use 64-bit integers, but you can use 32-bit integers?
2017 Nov 29
3
RFC: Adding 'no-overflow' keyword to 'sdiv'\'udiv' instructions
Introduction:
We would like to add new keyword to 'sdiv'\'udiv' instructions i.e. 'no-overflow'.
This is the updated solution devised in the discussion: http://lists.llvm.org/pipermail/llvm-dev/2017-October/118257.html
The proposed keywords:
"nof" stands for 'no-overflow'
Syntax:
<result> = sdiv nof <ty> <op1>,
2019 Mar 21
2
Signed Div SCEVs
Hi,
I am working with SCEVs, I see the unsigned division of SCEVs, it is not
immediately clear to me why the signed division of SCEV expressions is not
supported by SE?
I would appreciate if some could clarify or point me to some links.
--
Regards,
DTharun
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2010 Jan 01
2
[LLVMdev] Assembly Printer
I am trying to understand how LLVM does code generation and I have a couple
of questions.
I am using LLVM 2.6.
First,
if I want to change the name of an instruction, all I need to do is to
modify the XXXInstrInfo.td, right?
Using Sparc as an example, if I wanted to output "mysra" instead of "sra",
in SparcInstrInfo.td, I would write,
defm SRA : F3_12<"mysra",
2017 Mar 29
2
sdiv in array subscript
Hi llvm-dev,
Looks like currently ScalarEvolution will give up if there is a sdiv in
array subscript, e.g.
int i;
A[i * 64 / 2]
in this case ScalarEvolution will just return an unknown for (i * 64 / 2).
For this case, InstCombine will do the jobs, but in general, is there a
pass to deal with the sdiv here? like replace sdiv by udiv based on the
range of "i"?
Thanks
Hongbin
2015 Feb 17
5
[LLVMdev] why llvm does not have uadd, iadd node
Hi guys,
I just noticed that the LLVM has some node for signed/unsigned type( like udiv, sdiv), but why the ADD, SUB do not have the counter part sadd, uadd?
best
kevin
2017 Aug 11
2
PHI nodes and connected ICMp
Thank you for your answer! I tested your example, yes, perhaps I should
preserve some kind of tree to parse this start and end expressions for
induction variable... I was surprised, that SCEV cannot compute the
tripcount here. I thought, that all linear and maybe expressions with
multiplication are suitable for analysis.
2017-08-10 19:30 GMT+02:00 Sanjoy Das <sanjoy at google.com>:
> Hi
2017 Aug 13
2
PHI nodes and connected ICMp
To continue this topic:
sometimes SCEV's behavior is rather controversial : for loops with i
changing as i \=2 for example, he can't figure what the type of expressions
is, but surprisingly can determine max trip count. Shouldn't it be able to
detect or not detect these parameters at the same time?
2017-08-11 15:56 GMT+02:00 Anastasiya Ruzhanskaya <
anastasiya.ruzhanskaya at
2014 Apr 25
4
[LLVMdev] Proposal: add intrinsics for safe division
On April 25, 2014 at 9:52:35 AM, Eric Christopher (echristo at gmail.com) wrote:
Hi Michael,
> I’d like to propose to extend LLVM IR intrinsics set, adding new ones for
> safe-division. There are intrinsics for detecting overflow errors, like
> sadd.with.overflow, and the intrinsics I’m proposing will augment this set.
>
> The new intrinsics will return a structure with two
2017 Mar 29
2
sdiv in array subscript
Hi Eli,
Thanks. Do you mean ideally we should extend SimplifyIndVar to do the
sdiv->udiv replacement?
Thanks
Hongbin
On Wed, Mar 29, 2017 at 10:59 AM, Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 3/29/2017 10:35 AM, Hongbin Zheng via llvm-dev wrote:
>
>> Hi llvm-dev,
>>
>> Looks like currently ScalarEvolution will give up if there is a sdiv in
2017 Aug 09
4
ind variable
This support was removed years ago from indvars. We don't need canonical
induction variables any more as all analysis are done on SCEVs. The SCEV
generator can transform them even without the need for explicit
canonical induction variables.
Best,
Tobias
On Wed, Aug 9, 2017, at 14:23, Anastasiya Ruzhanskaya via llvm-dev
wrote:
> The files of this strange pass are described here
>
2017 Sep 02
3
getelementptr
Ok, thank you. I have also one question about getelementptr. In different
versions of clang I see that sometimes array[i][i] is preceded by two
getelementptr instructions and sometimes only by one - with an already
complex index.
2017-09-01 12:50 GMT+02:00 David Chisnall <David.Chisnall at cl.cam.ac.uk>:
> On 1 Sep 2017, at 11:44, Anastasiya Ruzhanskaya via llvm-dev <
> llvm-dev
2017 Aug 07
2
vrp
I am primarily interested in phi nodes and their induction variables, in
ValueTracking file there is an analysis of them, but if the upper bound is
inf, it is not working?
2017-08-07 11:41 GMT+02:00 Anastasiya Ruzhanskaya <
anastasiya.ruzhanskaya at frtk.ru>:
> So, it is not supported to determine by this instruction : %cmp = icmp slt
> i32 %i.03, 99,
> that %i.03 = phi i32 [ 0,