similar to: Deprecating the experimental microMIPS64R6 backend

Thanks for the quick answer Bruce. So far as I can tell (from a quick read), this is really for integrated assemblers/disassemblers - but we use an external assembler. When invoking clang we would provide ‘-mcpu=chip_v1’ or ‘-mcpu=chip_v2’, and the mnemonic ‘LD32’ is only valid when compiling for ‘chip_v1’, while ‘LD.32’ is only valid when compiling for ‘chip_v2’. But I will study the

Hello Daniel, At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday. Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with

Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips

On Tue, Aug 1, 2017 at 3:01 AM, Simon Dardis <Simon.Dardis at imgtec.com> wrote: > Currently I'm getting "Couldn't write to remote file "/home/testers/uploads/clang+llvm-5.0.0-rc1-mips-linux-gnu.tar.xz": Failure", > does that account need more space? Yes, the partition is full. I've asked Anton to see if we can fix this.

Is it possible to assign the value of subtarget features using more complex expressions with code as opposed to using the mechanism that tablegen affords. For example, if Mips16 or Micro Mips is not present, then I want the subfeature "standard encoding". If I can't do this, then it requires me to write a more complex expression for the "standard encoding" expresions.

Hi, Looks ok for native MIPS, I have two failures on debian8: Failing Tests (2): XRay-x86_64-linux :: TestCases/Linux/argv0-log-file-name.cc XRay-x86_64-linux :: TestCases/Linux/fixedsize-logging.cc I'll investigate these failures. Otherwise looks ok. I've uploaded the binaries. 9d5a389c20eb5b3071e6a0504b7cf87d clang+llvm-4.0.0-rc1-mipsel-linux-gnu.tar.xz

Thanks, that sounds like it would work. Was this based on what any other target did? Or do any other targets take this approach? I just want to make sure that we don't already have a hook suitable for this. Overriding runOnFunction to run what could be described as just a "late SelectionDAG pass" sounds pretty intrusive. Do you remember other approaches that didn't work? --

Dear community, I will be leaving MIPS on the 20th to pursue other LLVM based endeavours. As such, I am stepping down as code owner. My apologies for the timing with regard to the current release, I had hoped that the process would have be complete by then. I would like to nominate Simon Atanaysan as the new code owner for the MIPS backend. Thanks, Simon -------------- next part

Oh, one thing I forgot to mention: ReadOnly objects are also counted as small data globals on PPC (on top of BSS, Data, Common). That's what the r2 base is for (.sdata2, defined to be constant data). 32-bit immediate loads take 2 ops minimum on PPC, so even constant loading benefits from small data. It'd be handy to add a third argument containing what kind would normally be returned:

在 2017年04月26日 16:51, Simon Dardis 写道: > Hi Leslie, > > I've been seeing those failures as well (I own those buildbots). Like yourself, I'm a bit > uncertain as to why they're occurring. I'm currently investigating. I suspect it's a case > that the build directory has gone stale. Perhaps! and buildbots cover how many LLVM Backend targets? thanks! > >

Hi, Sorry for the late report but I've only just found these issues. Llvm.org isn't working for me at the moment but I'll file tickets once it is. The issues are: 1. Almabench has some significant numerical differences and fails the reference check for some configs. I'm investigating this one at the moment but early indications are that it's a similar (but different)

> > > clang+llvm-3.6.0-rc2-mipsel-linux-gnu.tar.xz > > > All clear for default options. > > > Still running for the other configs. > > > > I just had to kill Searching-dbl.simple and Packing-dbl.simple for the > > mips32 config which were at 65hrs and 15hrs real time respectively. This is > > far in excess of the 15,000s time limit that's

Hi Rui, Rafael, You are reviewers of two MIPS related patches for LLD linker: - Handle cross-mode (regular <-> microMIPS) jumps https://reviews.llvm.org/D40147 - Multi-GOT implementation https://reviews.llvm.org/D31528 Both patches implement essential part of MIPS architecture. microMIPS is something like ARM Thumb. Multi-GOT support required to link any rather complex application

Just pinging this patch for review, particularly from PPC maintainers: https://reviews.llvm.org/D26344 It's now rebased for the latest master commits, `check-all` test results match those of the upstream base. There is also a clang driver patch, extending PPC target support for the `-G` flag: https://reviews.llvm.org/D26345 And lld patch implementing the _SDA_BASE_ symbols and includes an

I've prepared a preliminary patch with the intention of implementing PPC-EABI subtarget features for applications that run in a standalone embedded environment. https://reviews.llvm.org/D26344 The most significant difference compared with the SVR4 ABI is the use of SDA (small data area). This allows full-word constants and data to be grouped into small-data sections accessed using relocated

Hi, No major issues seen so far for mips. Binaries uploaded. SHA256(clang+llvm-6.0.0-rc3-mipsel-linux-gnu.tar.xz)= 6e4fab79cc341a9084dab94cced108daff39fcde14a11e8d7ae454e9f92cb77c SHA256(clang+llvm-6.0.0-rc3-mips-linux-gnu.tar.xz)= 54887a039d3d7ccff17a0c7245f4c9d778a1c22f96b619db554849da55293d61 SHA256(clang+llvm-6.0.0-rc3-x86_64-linux-gnu-debian8.tar.xz)=

Hi All, I'm going to be leaving Imagination on the 19th of August and moving on to a different LLVM opportunity at Apple a few weeks later. As such, I feel it's time for me to step down as code owner of the Mips target so that we have a single code owner throughout the LLVM 3.9 release which is scheduled to finish just after my last day. I'd like to nominate Simon Dardis as the new

Hi Hans, I'm seeing one unexpected failure: libc++ :: std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area/pbump2gig.pass.cpp Test logs show: Standard Error: -- terminating with uncaught exception of type std::length_error: basic_string -- but only on my big endian MIPS machine. I have filed PR36373 for the above failure. I've looked at the failures

The problem is that everything about the mips32 and micro mips 16 instruction is the same, aside from the encoding in to binary. Seems like maybe we need to extend the notion of an instruction so that it can have alternate encodings depending on subtarget. On 09/05/2012 08:28 PM, Jim Grosbach wrote: > The instructions are defined by their encodings, not the assembly syntax. You want

Hi, I'm seeming new regressions form 4.0.0 for mips big endian: DataFlowSanitizer-mips64 :: custom.cc DataFlowSanitizer-mips64 :: propagate.c SanitizerCommon-asan-mips-Linux :: sanitizer_coverage_trace_pc_guard-dso.cc SanitizerCommon-asan-mips-Linux :: sanitizer_coverage_trace_pc_guard.cc SanitizerCommon-asan-mips64-Linux :: Linux/getpwnam_r_invalid_user.cc