similar to: MSP430 code generation from LLVM IR

On Thu, Jul 6, 2017 at 1:35 AM, Nicholas Wilson < iamthewilsonator at hotmail.com> wrote: > Luís, try using the -no-integrated-as flag to execute the assembler for > you. > We should probably make that the default for MSP430. > Cool. When I did that on macOS, LDC generated a lot of complaints, possibly because it is assuming mach-o files. I tried changing from -mtriple=msp430

> Hi all, > > We have a Samba AD DC service running on Ubuntu 16.0.4 with Samba > 4.3.11. We are planning to upgrade it to a recent version, probably > 4.8.3. > > I think that I have two options: > > a) Package upgrade via 3rd party repositories (Louis Van Belle's repo) > by following wiki. > > b) A fresh install of 4.8.3 on another VM then join it to

Compiling for AArch64: CommandLine Error: Option 'aarch64-branch-relax' registered more than once! Hi all! I am trying to run LDC (LLVM-based D compiler) on AArch64. The compiler contains all IR and target specific passes. You can view it as combined llc/opt tool. It uses the same strategy as opt to collect the passes with the NameParser. Like llc, it calls

On Mon, 16 Jul 2018 08:03:22 +0000 (UTC) Taner Tas <taner76 at gmail.com> wrote: > > Hi all, > > > > We have a Samba AD DC service running on Ubuntu 16.0.4 with Samba > > 4.3.11. We are planning to upgrade it to a recent version, probably > > 4.8.3. > > > > I think that I have two options: > > > > a) Package upgrade via 3rd party

Hi all, We have a Samba AD DC service running on Ubuntu 16.0.4 with Samba 4.3.11. We are planning to upgrade it to a recent version, probably 4.8.3. I think that I have two options: a) Package upgrade via 3rd party repositories (Louis Van Belle's repo) by following wiki. b) A fresh install of 4.8.3 on another VM then join it to 4.3.11 as backup DC, then transfer all FSMO roles on new and

hi LLVM community, Maybe it is the wrong place, sorry LDC it is a D compiler D1 : http://www.dsource.org/projects/ldc D2 : http://bitbucket.org/prokhin_alexey/ldc2 We need some LLVM developper for help this project, they are an ric channel on freenode #ldc Any help are welcome Thanks for all Yours sincerely, -- jonathan MERCIER <bioinfornatics at gmail.com>

In first, i hope i can discuss here I would like generate a shared lib without gcc but i fail. With my D compiler i do: $ ldc2 --output-bc --output-o -op -release -c -relocation-model=pic -od=../build *.d llvm bytecode finish with .wc and are in ../build directory $ cd ../build $ lvm-ld -link-as-library -o libDparser.bc -L/usr/local/lib64/ -L/usr/lib64 -ldruntime-ldc -llphobos2 -lm -ldl -lrt

Kai Nacke via llvm-dev <llvm-dev at lists.llvm.org> writes: > Compiling for AArch64: CommandLine Error: Option > 'aarch64-branch-relax' registered more than once! > > Hi all! > > I am trying to run LDC (LLVM-based D compiler) on AArch64. The > compiler contains all IR and target specific passes. You can view it > as combined llc/opt tool. It uses the same

Hello all! I extended the LDC2 with a pragma to register a funcion in the llvm.global_ctors or llvm.global_dtors list. On Linux, references to these functions are placed in .ctors and .dtors sections and everything runs fine. On Windows, functions from llvm.global_ctors are placed in section .CRT$XCU, which is automatically called by the MS C Runtime. However, functions from

In summary we have no less than six patches required to support Win64 SEH MinGW. The first five could be committed after review and LGTM but the last one also requires Ray Donnelly approval. Please comment in the Phabricator so the comments would be kept in context. 'unreachable' trap http://reviews.llvm.org/D3417 Win64 SEH (LLVM) http://reviews.llvm.org/D3418 Win64 SEH (clang)

On Thu, Jul 6, 2017 at 2:19 AM, Tim Northover <t.p.northover at gmail.com> wrote: > On 5 July 2017 at 17:51, Luís Marques via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > Cool. When I did that on macOS, LDC generated a lot of complaints, > possibly > > because it is assuming mach-o files. I tried changing from > -mtriple=msp430 > > to

i want to emit binary code for the following implemented vector assembly instructions. P_256B_LOAD_DWORD R_0_R2048b_0, pword ptr [rip + b] P_256B_LOAD_DWORD R_0_R2048b_1, pword ptr [rip + c] P_256B_VADD R_0_R2048b_0, R_0_R2048b_1, R_0_R2048b_0 P_256B_STORE_DWORD pword ptr [rip + a], R_0_R2048b_0 I added the following lines in X86MCInstLower.cpp; unsigned NewOpc; switch (OutMI.getOpcode())

Hi LLVM developers, As PR35281 mentioned: $ llvm-objcopy -O binary llvm-cortex-m7.elf llvm-cortex-m7.bin llvm-objcopy: 'llvm-cortex-m7.elf': The file was not recognized as a valid object file. if (ELFObjectFile<ELF64LE> *o = dyn_cast<ELFObjectFile<ELF64LE>>(&Binary)) https://github.com/llvm-mirror/llvm/blob/master/tools/llvm-objcopy/llvm-objcopy.cpp#L200