similar to: Public share with ADS security

Hello, list; This is my second try asking for help. One person responded and provided help, but I still can't seem to work this out. I've searched, but have failed. I'm not new to Samba, but I can and do make mistakes...so here I am. I have a fresh install of Ubuntu 13.10 with Samba 3.6.18. I have Kerberos properly configured and have successfully joined the domain, and can list

I have no experience with GIS whatsoever. I really know squat about it. I'm currently working on a project to plot locality data for wildlife on a map of Shasta County. This is for a new herpetological club that hopes to track strength of our local herp populations, since it seems evident that in the last 20 years we lost one species of frog and are close to losing another (probably less

Jerome: No, there are no plans to JIT to SPU. That's considerably more complicated -- you'd have to figure out when to JIT to the SPU and live with all of the constraints that the SPU imposes (data reformatting, r/w DMA, ensure your code lives in 256K unless you can manage to interface with the virtual I-cache work.) Basically, it's not trivial and it doesn't quite fit into the

Thank very much for this answer, so my last question will be: is it possible to use the LLVM JIT on a PS3 with Yellow Dog 6.2 distribution, instead of the LLVM interpreter, by using the PPE as it seems to be similar to 64-bit PowerPC processors? 2009/12/18 Scott Michel <scooter.phd at gmail.com> > Jerome: > > No, there are no plans to JIT to SPU. That's considerably more

Hi: Summary: I am trying to determine the 90th percentile of ambulance response times for groups of data. Background: A fire chief would like to look at emergency response times at the 90th percentile for 1 kilometer grids in Cape Coral, Florida. I have mapped out ambulance response times on a GIS map. Then I superimpose a regularly-spaced grid over the response times and spatially join the

On Aug 13, 2007, at 9:11 PM, Chris Lattner wrote: > Nope, passes work within a module, they can't create/delete them. So there is no possibility to write a pass to arrange functions and globals in a different than the given way? No way to partition the structure new? I would really like to know how code is generated for heterogeneous architectures like Cell? I thought they use a

On Thu, May 7, 2009 at 9:39 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Thu, May 7, 2009 at 9:03 AM, Kshitiz Garg <ksh.cseiitk at gmail.com> wrote: >>    I was trying to extract out the IR for some CELLBE code. However i >> was not able to compile with llvm-gcc. > > Can you give a couple examples of error messages you're getting? llvm-gcc

Hello > Is there additionnals information to provide to the linker when > compiling llvm on mac os x? Do you have libffi installed somehere? > > > The second question concerns Yellow Dog Distribution(6.2) on CellSPU > processor. Does lli support JIT compilation on CELL? No. As far as I can see, there is no JIT for SPU. -- With best regards, Anton Korobeynikov. Faculty of

Is there an R equivalent to SAS's proc gremove? You would use this procedure to combine the units on an existing map, for example to build a map of Metropolitan Statistical Areas (MSAs) from the [US] counties dataset where the internal boundries surround the MSAs (which are groups of counties) rather than the individual counties. I can imagine the mechanism would be to find and erase the

On Thu, 2010-06-03 at 02:53 +0200, Jakob Stoklund Olesen wrote: > If you are using the local register allocator, please try switching to the fast allocator and report any bugs you find. > Tried it, and it seems to break quite a big chunk of our tests on SPU :) Before r103488 ("Mostly rewrite RegAllocFast") there was no problem. But with r103488, I get a:

Firstoff, let me say what a mind fsck the Cell SPU can be. It's really not that hard an architecture to get one's mind around, but I can see how it becomes a compiler writer's nightmare. And I'm attempting to write a SPU backend. And it's going slowly. Here's my problem: The SPU's registers are all 128-bit vector registers. That's their native mode. They can be

Hi, attached is a second try for the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions: -in vararg handling, registers are marked to be live, to not confuse the register scavenger -function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the

On Mar 29, 2010, at 6:50 AM, Kalle Raiskila wrote: > attached is a second try for the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions: > -in vararg handling, registers are marked to be live, to not confuse the register scavenger Looks good. You can try running with -verify-machineinstrs to detect

On Thu, May 7, 2009 at 10:12 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Thu, May 7, 2009 at 9:25 AM, Kshitiz Garg <ksh.cseiitk at gmail.com> wrote: >>> Can you give a couple examples of error messages you're getting? >>  llvm-gcc -emit-llvm -S        -W -Wall -Winline -Wno-main  -I.  -I >> /opt/cell/sysroot/usr/spu/include -I >>

Chris Lattner wrote: >>It is possible to write multi-instruction pattern, e.g. >>X86InstrSSE.td line 1911. But how are you defining HI16 and LO16? >>Sounds like you want to define them as SDNodeXform that returns upper >>and lower 16 bits respectively. Take a look at PSxLDQ_imm in >>X86InstrSSE.td as an example. > > > Another good example is the PPC

I was able to resolve my previous question about dealing with custom loads/stores, and following Chris' suggestion, the IBM Cell SPU backend can generate code for "int main(void) { return 0; }" without crashing llc. There's a lot of work still to be done... like getting frame offsets correctly computed and hauling in the raft of intrinsics that the Cell SDK defines. Three quick

Super, Thanks On Fri, Sep 22, 2017 at 4:57 PM, Boris Steipe <boris.steipe at utoronto.ca> wrote: > > a <- c("<0.1", NA, 0.3, 5, "Nil") > > a > [1] "<0.1" NA "0.3" "5" "Nil" > > > b <- as.numeric(a) > Warning message: > NAs introduced by coercion > > b > [1] NA NA 0.3

Hi, Lets say this was a dataframe where I had two columns a <- c("<0.1", NA, 0.3, 5, "Nil") b <- c("<0.1", 1, 0.3, 5, "Nil") And I just want to remove the rows from the dataframe where there were NAs in the b column, what is the syntax for doing that? Thanks in advance On Fri, Sep 22, 2017 at 5:04 PM, Shane Carey <careyshan at

On Tue, 9 Jan 2007, Evan Cheng wrote: >> - How does one deal with multiple instruction sequences in a pattern? >> To load a constant is a two instruction sequence, but both >> instructions only take two operands (assume that r3 is a 32-bit >> register): >> >> ilhu $3, 45 # r3 = (45 << 16) >> iohl $3, 5 # r3 |= 5

On Thu, May 7, 2009 at 9:25 AM, Kshitiz Garg <ksh.cseiitk at gmail.com> wrote: >> Can you give a couple examples of error messages you're getting? >  llvm-gcc -emit-llvm -S        -W -Wall -Winline -Wno-main  -I.  -I > /opt/cell/sysroot/usr/spu/include -I > /opt/cell/sysroot/opt/cell/sdk/usr/spu/include  -O3 -c simpleDMA_spu.c > simpleDMA_spu.c:42:23: error: