similar to: All Mail folder as in Gmail

Hi! My mail server works in tandem: Dovecot (IMAP) + Postfix. How can I configure in Gmail: Outgoing email copied to the Sent folder using postfix without mail client? This question is for the mailing list for Postfix? Mail client itself copies outgoing messages in the folder Sent, but the messages are large, and the server is far away. And to transmit email twice for sending and copying is

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On Thu, 22 May 2014, Dmitry Podkovyrkin wrote: > My mail server works in tandem: Dovecot (IMAP) + Postfix. > How can I configure in Gmail: Outgoing email copied to the Sent folder using > postfix without mail client? This question is for the mailing list for > Postfix? > Mail client itself copies outgoing messages in the folder Sent,

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On Thu, 22 May 2014, Dmitry Podkovyrkin wrote: > Yes, it is a solution to this problem. But for a single user. Well, no. Every user can add a BCC in his client. Maybe you use a central client configuration setup. I don't know your situation. > And how can you > do it for the entire server? Well, as I said, "in postfix".

Thanks for the info! I would be glad to hear of any issues you have encountered on this path. I tried to make sure the 3.3 release was fully compatible with the libdevice implementation shipping with 5.5 (and as far as I know, it is). It's just not an officially supported configuration. Also, I've been meaning to address your -drvcuda issue. How would you feel about making that a part

Dear all, FWIW, I've tested libdevice.compute_20.10.bc and libdevice.compute_30.10.bc from /cuda/nvvm/libdevice shipped with CUDA 5.5 preview. IR is compatible with LLVM 3.4 trunk that we use. Results are correct, performance - almost the same as what we had before with cicc-sniffed IR, or maybe <10% better. Will test libdevice.compute_35.10.bc once we will get K20 support. Thanks for

Remove our (soon to be) bouncing email addresses, and update Dmitri's address. Dmitry will take over as maintainer for CAIF from now on. Cc: Vikram Arv <vikram.arv at stericsson.com> Cc: Dmitry Tarnyagin <dmitry.tarnyagin at stericsson.com> Cc: Dmitry Tarnyagin <dmitry.tarnyagin at lockless.no> Signed-off-by: Sjur Br?ndeland <sjur.brandeland at stericsson.com> ---

Remove our (soon to be) bouncing email addresses, and update Dmitri's address. Dmitry will take over as maintainer for CAIF from now on. Cc: Vikram Arv <vikram.arv at stericsson.com> Cc: Dmitry Tarnyagin <dmitry.tarnyagin at stericsson.com> Cc: Dmitry Tarnyagin <dmitry.tarnyagin at lockless.no> Signed-off-by: Sjur Br?ndeland <sjur.brandeland at stericsson.com> ---

The tests have worked fine on Windows for a while now when building with an MSVC environment. As for the tests failing, what tests are failing for you? Can you pastebin the results? I have seen issues with MSVC11, but not MSVC10. Thanks! ~Aaron On Fri, Feb 8, 2013 at 11:44 AM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > Last time I checked, running the tests on

@Dmitry, you may get more traction by reporting this issue (with patch) at https://www.openssh.com/report.html . It can also help other folks who may be encountering the same issue. -- jmk > On Mar 3, 2023, at 02:10, Dmitry Belyavskiy <dbelyavs at redhat.com> wrote: > > ?Dear colleagues, > > Could you please take a look? > >> On Fri, Jan 20, 2023 at 12:55?PM

Last time I checked, running the tests on Windows with MSVC was a PITA. The test scripts still expect a UNIX-like environment, so a lot of tests fail. If that has been rectified, someone please let me know! I would imagine it should work much better with cygwin, or mingw with a bash shell and utils. On Fri, Feb 8, 2013 at 11:29 AM, Dmitry Babokin <babokin at gmail.com> wrote: >

> The issue is really that there is no standard math library for PTX. Well, formally, that could very well be true. Moreover, in some parts CPU math standard is impossible to accomplish on parallel architectures, consider, for example errno behavior. But here we are speaking more about practical side. And the practical side is: past 5 years CUDA claims to accelerate compute applications, and

The X86 back-end just calls into libm: // Always use a library call for pow. setOperationAction(ISD::FPOW , MVT::f32 , Expand); setOperationAction(ISD::FPOW , MVT::f64 , Expand); setOperationAction(ISD::FPOW , MVT::f80 , Expand); The issue is really that there is no standard math library for PTX. I agree that this is a pain for most users, but I

Hi Dmitry, ISPC does some instruction selection as part of vectorization (on ASTs!) by placing intrinsics for specific operations. The SEXT to i32 pattern was implemented because LLVM did not support vector-selects when this code was written. Can you submit a small SSE4 test case that demonstrates the problem? Select is the canonical form of this operations, and SEXT is usually more

It's been working for me for almost two years now. You do have to have the proper prereqs in place, of course (like GnuWin32, Python, etc). ~Aaron On Fri, Feb 8, 2013 at 12:51 PM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > Alright, that's good news! When was this fixed? > > > On Fri, Feb 8, 2013 at 12:16 PM, Aaron Ballman <aaron at

Hi, It looks like I've found something strange. It looks like dovecot updates fts-lucene index every time I'm opening virtual folder that contains FTS query: indexer-worker(dion): Warning: fts-lucene: Settings have changed, rebuilding index for mailbox dovecot-virtual is pretty simple: archive/INBOX BODY "test" first of all, I'm trying to perform FTS in archive/INBOX

Hello, I'm compiling llvm+clang (both are 3.2) on Windows using CMake + VS2010 (SP1). I have ALL_BUILD successfully passing, but "check-all" fails. Is it expected to pass? Is it expected to pass on Windows with any other toolchain? -Dmitry -------------- next part -------------- An HTML attachment was scrubbed... URL:

Nadav, You are absolutely right, it's ISPC workload. I've checked SSE4 and it's also severely affected. We use intrinsics only for conversion <N x i32> <=> i32, i.e. movmsk.ps. For the rest we use general LLVM instructions. And I actually would really like to stick this way. We rely on LLVM's ability to produce efficient code from general LLVM IR. Relying on

Hi Dmitry, CC sfr On Tue, Jan 21, 2025 at 11:44?AM Dmitry Baryshkov <dmitry.baryshkov at linaro.org> wrote: > On Tue, 21 Jan 2025 at 11:13, Geert Uytterhoeven <geert at linux-m68k.org> wrote: > > On Tue, Jan 7, 2025 at 12:31?PM Dmitry Baryshkov > > <dmitry.baryshkov at linaro.org> wrote: > > > On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote:

On Tue, 21 Jan 2025 at 11:13, Geert Uytterhoeven <geert at linux-m68k.org> wrote: > > Hi Dmitry, > > On Tue, Jan 7, 2025 at 12:31?PM Dmitry Baryshkov > <dmitry.baryshkov at linaro.org> wrote: > > On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote: > > > While working on the generic mode_valid() implementation for the HDMI > > > Connector

Hi Dmitry, On Tue, Jan 7, 2025 at 12:31?PM Dmitry Baryshkov <dmitry.baryshkov at linaro.org> wrote: > On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote: > > While working on the generic mode_valid() implementation for the HDMI > > Connector framework I noticed that unlike other DRM objects > > drm_connector accepts non-const pointer to struct drm_display_mode,