Displaying 20 results from an estimated 800 matches similar to: "Asterisk 12 with sipml5+ PJNATH issue"
2016 May 26
3
pjsip segfault problem
hi,
after switch from 13.7 + pjproject 2.4.5 to 13.9.1 pjproject bundled i
have problem with segfault (centos 6)
Program terminated with signal 11, Segmentation fault.
#0 0xb7665695 in check_cached_response (sess=0xafbd688c,
packet=0xb07676d8, pkt_size=132, options=1, token=0xafecc2bc,
parsed_len=0x0, src_addr=0xb0e47a20, src_addr_len=16)
at ../src/pjnath/stun_session.c:1287
1287
2013 Oct 31
0
Trap invalide opcode error
Hello,
Using Ubuntu Server 12.04 and Asterisk 11.2.1.
I'm getting the following error when trying to start asterisk:
(Syslog) kernel: [ 1032.713864] asterisk[26918] trap invalid opcode ip:7fc272923076 sp:7fff928cf1b0 error:0 in codec_ilbc.so[7fc272921000+e000]
We were running Asterisk on a physical box, but moved it to a virtual environment. That went fine. Asterisk started normally and
2013 May 02
1
Building Asterisk 11.4.0-rc1 with PJSIP 2.1
Hello,
I'm working on building Asterisk 11.4.0-rc1 with pjproject 2.1 instead of
2.0 due to a crashing issue resulting from ICE.
https://issues.asterisk.org/jira/browse/ASTERISK-21696
Currently, I'm systematically going through each Makefile in every
directory in pjproject and changing the paths that exist in the pjproject
2.0 included with Asterisk, so that I can successfully build
2019 Dec 12
2
asterisk pjsip webrtc rtp to private IP
Asterisk is on public IP (as described in the first email)
i have 10 years experience in voip, 4 years webrtc in production. i know
about ICE/STUN/DTLS-SRTP. yes, not every detail but the basic mechanism
but i confess. i dont understand WHY Asterisk SOMETIMES switches
destination IP in RTP. this is not only about ICE. its about RTP engine
too which is Asterisk specific
and Asterisk DEBUG is
2007 Nov 14
4
Creating a group share
Hello,
I have a Samba PDC (3.x) running in a OpenSUSE 10.2 system. The
authentication backend is Open LDAP.
I want to create a group share (WTCCC) which should be accessible to a
group of users (belonging to a group called WTCCC). The users' possess
this group as their secondary group (NOT primary).
And the share folder would have its gid bit set, so all the writes to
the folder
2008 Sep 16
2
[LLVMdev] DOTGraphTraits and GraphWriter
Hi Dan,
Thanks for the reply. I got the labels for each outgoing edge (at the
source node's 'structure' field) working. Is there a way to find out
the outgoing edge number from EdgeIter. (Basically the Node in my
graph has a a bunch of outgoing edges, so that I can just index into
that collection within the node to get the appropriate edges'
attributes).
regards,
Prakash
On Tue,
2019 Aug 26
2
Segfault in libpjnath.so.2 though PJSIP not present in dialplan
Le lun. 26 août 2019 à 12:07, Joshua C. Colp <jcolp at digium.com> a écrit :
> ...
>
> libpjnath is the ICE/STUN/TURN library which is used by res_rtp_asterisk
> for that functionality. If you're using WebRTC or ICE/STUN/TURN, then you
> would be using that library.
>
Yes, I'm using ICE/STUN/TURN.
That explains libpjnath usage.
Thank you sharing this here.
Now
2008 Sep 22
0
[LLVMdev] DOTGraphTraits and GraphWriter
Hi Prakash,
I don't know of an easy way to do this, other than to use random-access
iterators so you can compute the distance between the edge and the
beginning of the list of edges.
Dan
On Sep 16, 2008, at 2:58 PM, Prakash Prabhu wrote:
> Hi Dan,
>
> Thanks for the reply. I got the labels for each outgoing edge (at the
> source node's 'structure' field) working. Is
2008 Nov 04
4
[LLVMdev] Debugging lli using bugpoint
Hi Evan,
Thanks for the pointers. We found a simple test case that causes the problem
(thanks to Tom in my group):
#include<stdio.h>
#include<stdlib.h>
void test();
void (*funcPtr)();
int main(int argc, char **argv) {
funcPtr = test;
test();
}
void test() {
if(funcPtr == test) {
printf("OK!\n");
} else {
fprintf(stderr, "Bad!\n");
exit(1);
2008 Sep 15
2
[LLVMdev] DOTGraphTraits and GraphWriter
Hi all,
I have two questions related to .dot graph output. Basically, I have a
graph representing a program dependence graph like structure with
(a) multiple edges between the same pair of nodes
(b) each edge having a special (different) text/label
I implemented a template-specialized version of DotGraphTraits for the
my graph structure which given a node, uses a map_iterator (similar to
the one
2017 Mar 05
3
GSoc 2017 Introduction(Weighting Schemes)
Hello Everyone,
I am a second year graduate student at IIIT-Bangalore and my interest is in
the field of Information Retrieval. I have successfully compiled Xapian
from source and have implemented some examples. While going through the
project list Weighting Schemes project is the one I was looking to
contribute to. So i went through the xapian-core/weight where most of the
schemes are already
2007 Dec 10
1
[Problem] [Centos 5] Samba-3.0.23c-2 login authentication problem
Hello,
I have comfigured samba-3.0.23c-2 server on CentOS-5, but when i was logging in from the client system, even if I donot provide password and hit enter key, the client is logging in as Anonymous user. Samba server should not allow for Anonymous login. (I am configuring linux (Server) to linux (Client) i am not using windows)
1) The contents of /etc/samba/smb.conf file as follows,
2006 Apr 29
1
crosscomiling speex for powerPC
Hi
As per the Linphone, Readme.arm I tried to compile the speex.
-------------------------------------readme.arm--------------------------------------------------
...........
Cross compiling speex for ARM:
********************************
First you need to remove ogg headers from your build system to avoid a dirty conflict between your build machine binaries and the arm binaries. They
2014 Aug 01
2
[LLVMdev] LLVM Basic Program Compilation
I am just getting started with llvm.
Here's code I am trying to compile:
#include <stdio.h>#include "llvm/IR/LLVMContext.h"#include
"llvm/IR/Module.h"#include "llvm/IR/IRBuilder.h"
int main(){
llvm::LLVMContext& context = llvm::getGlobalContext();
llvm::Module* module = new llvm::Module("top", context);
llvm::IRBuilder<>
2014 Sep 09
2
[LLVMdev] Machine Code for different architectures
How does LLVM generate machine code for different architectures?
For example, the machine code for x86 and amd will vary.
How does LLVM convert its IR to machine code for different
architectures.Can you please explain the approach? Is it just write two
different programs for two different architectures and pass a flag to the
compiler based on which machine code you want to generate?
Thanks a lot
2009 Jan 14
2
[LLVMdev] Mapping between LLVM bitcode and C source
Hi,
Is there a way, from within an opt pass, to find the correspondence
between an LLVM IR object and C source code (basically line number
info similar to the one used with gcc + gdb to help debugging ),
assuming either a llvm-gcc front end ?
Sorry if this question was asked before.
Thanks for your time.
- Prakash
2012 Aug 15
3
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM
Hi Hal
I was also looking at providing such a support in LLVM for capturing (both explicit and implicit)
parallelism in LLVM. We had an initial discussion around this and your proposal comes at the
right time. We support such an initiative. We can work together to get this support implemented
in LLVM.
But, I have a slight different view. I think today parallelism does not necessarily mean OpenMP
2008 Sep 24
2
[LLVMdev] Memory Altering/Accessing Instructions
Hi all,
Would it be correct to say that the only instructions in LLVM IR that
modify/access memory potentially are the following:
(1) LoadInst : Ref
(2) StoreInst : Mod
(3) VAArgInst : Ref (?)
(4) AllocaInst : Mod
(5) MallocInst : Mod
(6) FreeInst : Mod
(7) CallInst : Mod/Ref ?
Also, my earlier impression was that the GEP instruction only computes
the effective address and does not
2008 Nov 02
2
[LLVMdev] Debugging lli using bugpoint
Hi Eli,
Thanks for the reply. I tried with -Xlinker="-ldl ". However it does not
seem to make a difference. It seems that when bugpoint is run with
--run-jit, the linker args are not passed to gcc (from
tools/bugpoint/ExecutionDriver.cpp) :
if (InterpreterSel == RunLLC || InterpreterSel == RunCBE ||
InterpreterSel == CBE_bug || InterpreterSel == LLC_Safe)
RetVal =
2014 Aug 04
3
[LLVMdev] LLVM AllocaInst and StoreInst
Hi,
I am trying to write a simple interpreter.
I am trying to generate LLVM IR for assignment operation. The code for the
generation part looks like this
llvm::Value* codeGenSymTab(llvm::LLVMContext& context) {
> printf("\n CodeGen SymTab \n");
> Value *num = ConstantInt::get(Type::getInt64Ty(context), aTable.value,
> true);
> Value *alloc = new