similar to: new laptop: compiling source for i7 CPUs???

Current sources (git-b1b6caf) were compiled with GCC 4.8.2 and GCC 4.9.0 with various -msseN options (the default is -msse2). Then I took two WAV files (one is 16-bit and the other is 24-bit) and compressed them using best compression mode. The results are in the table below. (please remember that the resulting value is an encoding time, not encoding speed) CPU: Intel Core i7 950 (up to SSE4.2)

Hi, all. I posted this message to libvir-list last night, but just realized that was geared toward development rather than support. Apologies to those who are subscribed to both for the dupe. I'm having a weird problem where libvirt/qemu/kvm won't let me use the model processor I have defined in my domain's config file. Instead, I get the error message in libvirtd.log that:

Hello r-help, I am having trouble installing the add-on package gstat. I suspect (but I'm not sure) that the trouble may be that it runs all the checks for gcc, then uses Intel's compiler to actually compile. I have not been able to successfully force it to use gcc to test that theory. R CMD INSTALL and R.version() output follow below; any help greatly appreciated! -Tim -- Timothy

Hi Frank, I recommend trying trunk LLVM. AVX-512 development has been very active recently. -Hal ----- Original Message ----- > From: "Frank Winter via llvm-dev" <llvm-dev at lists.llvm.org> > To: "LLVM Dev" <llvm-dev at lists.llvm.org> > Sent: Wednesday, June 29, 2016 2:41:39 PM > Subject: [llvm-dev] avx512 JIT backend generates wrong code on <4

I have this code, which works fine on MacOS and Linux hosts: const char *target_specific_cpu_args; const char *target_specific_features; if (g->is_native_target) { target_specific_cpu_args = ZigLLVMGetHostCPUName(); target_specific_features = ZigLLVMGetNativeFeatures(); } else { target_specific_cpu_args = ""; target_specific_features =

Hi Hal! Thanks, but unfortunately it didn't help. The exact same assembler instructions are generated for both 3.8 (yesterday) and trunk (from today). So, this really looks like a bug. Best, Frank On 06/29/2016 03:48 PM, Hal Finkel wrote: > Hi Frank, > > I recommend trying trunk LLVM. AVX-512 development has been very active recently. > > -Hal > > ----- Original

The first patch adds SSE4.1/SSE4.2 detection. The second patch removes union data in struct FLAC__CPUInfo and replaces it with #ifdefs. Reason: currently it's possible to set or get data.ia32.sse3 value from x86-64 code, etc. It's a potential source of errors (at least that's true for me). (the 2nd patch requires the 1st to be applied) -------------- next part -------------- A

To disassemble jit code I typically use the udis86 support. Are there patches floating around to support SSE4.1 and SSE4.2 in this? I'd like to use it on a nehalem based machine and investigate the llvm code generation for SSE4.2 in a jit context. thanks bill -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi! When compiling the attached module with the JIT engine on an Intel KNL I see wrong code getting emitted. I attach a complete exploit program which shows the bug in LLVM 3.8. It loads and JIT compiles the module and prints the assembler. I stumbled on this since the result of an actual calculation was wrong. So, it's not only the text version of the assembler also the machine

I've been working on adding AVX to LLVM and have run across a number of questions. Here's the first one. In some ways AVX is "just another" SSE level. Having AVX implies you have SSE1-SSE4.2. However AVX is very different from SSE and there are a number of sub-features which may or may not be available on various implementations. So right now I've done this: def

On Apr 30, 2009, at 3:02 PM, David Greene wrote: > I've been working on adding AVX to LLVM and have run across a number > of > questions. Here's the first one. > > In some ways AVX is "just another" SSE level. Having AVX implies > you have > SSE1-SSE4.2. However AVX is very different from SSE and there are a > number > of sub-features which

# HG changeset patch # User Olaf Hering <olaf@aepfle.de> # Date 1338572607 -7200 # Node ID 3da83ff08d6b6431c104a431d6617ccb5977643b # Parent fde8ad0252ee6ddb8d71dda869db3b20b3d9ca62 xl.cfg: document the cpuid= option Signed-off-by: Olaf Hering <olaf@aepfle.de> diff -r fde8ad0252ee -r 3da83ff08d6b docs/man/xl.cfg.pod.5 --- a/docs/man/xl.cfg.pod.5 +++ b/docs/man/xl.cfg.pod.5 @@ -969,9

Hi all, I am running CentOS 7 on a NUC5CPYB. Intel video: 00:02.0 VGA compatible controller: Intel Corporation Atom/Celeron/Pentium Processor x5-E8000/J3xxx/N3xxx Integrated Graphics Controller (rev 35) When I take a screen shot I get "different" things. I use: export DISPLAY=:0.0 /usr/bin/xwd -silent -root -out screen; convert screen screen.png I tried import also for the screen

even if i make my code as follows: vectorized instructions not get emitted. What to do? int main(int argc, char** argv) { int a[1000], b[1000], c[1000]; int g=0; int aa=atoi(argv[1]), bb=atoi(argv[2]); for (int i=0; i<1000; i++) { a[i]=aa, b[i]=bb; c[i]=a[i] + b[i]; g+=c[i]; } printf("sum: %d\n", g); return 0; } On Thu, Aug 17, 2017 at 10:03 PM, Craig Topper <craig.topper at

On 30-Apr-09, at 6:38 PM, Dan Gohman wrote: > On Apr 30, 2009, at 3:02 PM, David Greene wrote: >> As I've been going along I've added feature flags for SSE4a and >> SSE5. These >> really do need to be separate feature flags because having SSE4a and/ >> or SSE5 >> does not imply that you have SSE4.2 or SSE4.1. So they can't be >> part of the

Is it possible to see the source code of the open-sourced SVML? The diff file does not include the library. I searched the Internet but I could not find. Regards, Naoki Shibata On 2016/07/15 13:55, Tian, Xinmin wrote: > Naoki, > > Intel is planning open-source SVML library (most of them if it not 100%), 6 functions of SVML are open sourced for GCC and LLVM already. But, Intel SVML

Hello, BSOD 0x00000101 CLOCK_WATCHDOG_TIMEOUT randomly appears on all HVM Windows 2008R2 (with signed GPLPV drivers) with vcpu''s>=2 after upgrading CPU to hexacore i7-3930K. xen and qemu-dm logs have no suspicious entries after bsod. Before upgrade CPU was i7-2600 and all HVM''s works fine. Such problem persist on all motherboards with i7-3930K,and disappear after moving Dom0

I am using a debian 9 guest, hosted on a ESXi platform with nested virtualisation enabled. On this debian 9 guest when I run libguesfs-test-tool, it fails with an error: "qemu-system-x86_64: /build/qemu-DqynNa/qemu-2.8+dfsg/target-i386/kvm.c:1805: kvm_put_msrs: Assertion `ret == cpu->kvm_msr_buf->nmsrs' failed." Instead when I use a wrapper script and hook it with the env

I suspect that there are 2 issues here: * I have incorrect alignment somewhere * MSVC / .pdb / CodeView debugging is not working correctly. I think the latter would help solve the former. I will send out a new email later talking about the issues I'm having debugging llvm-generated binaries with MSVC. On Sat, Sep 30, 2017 at 3:33 PM, Andrew Kelley <superjoe30 at gmail.com> wrote:

getProcessTriple just determines operation system, and architecture. It doesn't deal with specific instruction set features. The CPU should be controlled by MCPU on the EngineBuilder i think. The CPU autodetection code lives in getHostCPUName in lib/Support/Host.cpp, but I don't think the JIT calls into. I think its expected the user would call it or pass a specific CPU string to the MCPU