Displaying 20 results from an estimated 10000 matches similar to: "Unused variable?"
2015 Nov 13
2
[Aarch64 00/11] Patches to enable Aarch64
Thanks, I look forward to seeing what you find out. BTW, I was wondering 
if you tried replacing the SIG2WORD16 macro using the vqmovns_s32 
intrinsic? I'm sure it would be faster than the C code, but in the grand 
scheme of things it might not make much difference.
On 11/13/2015 12:15 PM, Jonathan Lennox wrote:
>> On Nov 13, 2015, at 1:51 PM, John Ridges <jridges at masque.com>
2015 Nov 13
2
[Aarch64 00/11] Patches to enable Aarch64
Hi Jonathan,
I'm sorry to bring this up again, and I don't want to beat a dead horse, 
but I was very surprised by your benchmarks so I took a little closer look.
I think what's happening is that it's a little unfair to compare the 
ARM64 inline assembly to the C code, because looking at the C macros in 
"fixed_generic.h" for MULT16_32_Q16 and MULT16_32_Q15 you find
2009 Jun 30
3
Delays estimation in Speex algorithms
Speex tells me that the decoder is always 5 ms, but it says that the 
encoder is 5 ms for NB, 8.9375 ms for WB, and 10.90625 ms for UWB. Is 
there an extra frame of delay in the encoder that isn't otherwise 
accounted for?
John Ridges
Jean-Marc Valin wrote:
> Quoting John Ridges <jridges at masque.com>:
>   
>> I also need to know the precise delays from Speex but I used
2009 Jul 22
2
A technical question about the speex preprocessor.
I got the approximation from a Google book:
http://books.google.com/books?id=2CAqsF-RebgC&pg=PA385
Page 392, formula (10.33)
Using this formula, you're right, hypergeom_gain() would *not* converge 
to 1 for large x, but would instead be gamma(1.25)/sqrt(sqrt(x)) which 
would approach zero. Now if the formula for the hypergeometric gain were 
instead gamma(1.5) * M(-.5;1;-x) / sqrt(x)
2009 Jul 22
2
A technical question about the speex preprocessor.
By my reckoning the confluent hypergoemetric functions should have the 
following values:
M(-.25;1;-.5) = 1.11433
M(-.25;1;-1) = 1.21088
M(-.25;1;-1.5) = 1.29385
M(-.25;1;-2) = 1.36627
M(-.25;1;-2.5) = 1.43038
M(-.25;1;-3) = 1.48784
M(-.25;1;-3.5) = 1.53988
M(-.25;1;-4) = 1.58747
M(-.25;1;-4.5) = 1.63134
M(-.25;1;-5) = 1.67206
M(-.25;1;-5.5) = 1.71009
M(-.25;1;-6) = 1.74579
M(-.25;1;-6.5) =
2015 Nov 20
2
[Aarch64 00/11] Patches to enable Aarch64
> On Nov 19, 2015, at 5:47 PM, John Ridges <jridges at masque.com> wrote:
> 
> Any speedup from the intrinsics may just be swamped by the rest of the encode/decode process. But I think you really want SIG2WORD16 to be (vqmovns_s32(PSHR32((x), SIG_SHIFT)))
Yes, you?re right. I forgot to run the vectors under qemu with my previous version (oh, the embarrassment!)  Fixed forthcoming
2009 Jul 22
2
A technical question about the speex preprocessor.
Thanks for the confirmation  Jean-Marc. I kind of suspected from the 
comments that it was the confluent hypergoemetric function, which I was 
trying to evaluate using Kummer's equation, namely:
M(a;b;x) is the sum from n=0 to infinity of (a)n*x^n / (b)n*n!
where (a)n = a(a+1)(a+2) ... (a+n-1)
But when I use Kummer's equation, I don't get the values in the 
"hypergeom_gain"
2015 Nov 23
1
[Aarch64 v2 05/18] Add Neon intrinsics for Silk noise shape quantization.
On Nov 23, 2015, at 12:04 PM, John Ridges <jridges at masque.com<mailto:jridges at masque.com>> wrote:
Hi Jonathan.
I really, really hate to bring this up this late in the game, but I just noticed that your NEON code doesn't use any of the "high" intrinsics for ARM64, e.g. instead of:
int32x4_t coef1 = vmovl_s16(vget_high_s16(coef16));
you could use:
int32x4_t coef1
2015 Mar 12
2
[RFC PATCHv2] Intrinsics/RTCD related fixes. Mostly x86.
Nit: in dual_inner_prod_sse, why not do both horizontal sums at the same 
time? As in:
     xsum1 = _mm_add_ps(_mm_movelh_ps(xsum1, xsum2), 
_mm_movehl_ps(xsum2, xsum1));
     xsum1 = _mm_add_ps(xsum1, _mm_shuffle_ps(xsum1, xsum1, 0xf5));
     _mm_store_ss(xy1, xsum1);
     _mm_store_ss(xy2, _mm_movehl_ps(xsum1, xsum1));
--John
2009 Jun 30
3
Delays estimation in Speex algorithms
JM,
I also need to know the precise delays from Speex but I used the 
SPEEX_GET_LOOKAHEAD control requests to determine them (plus the 
"speex_resampler_get_output_latency" function from the resampler). The 
returned values from the Speex lookahead request don't seem to match 
with the values you gave Alexander. Am I doing this wrong? Thanks,
John Ridges
speex-dev-request at
2015 Nov 16
0
[Aarch64 00/11] Patches to enable Aarch64
I?ve tried adding support for OPUS_FAST_INT64 to celt/arch.h, and I?ve found that this is indeed comparable in speed, if not a touch faster, than my inline assembly.  I?ll submit patches for this.
The inline assembly parts of my aarch64 patch set can thus be considered withdrawn.
I haven?t yet tried replacing SIG2WORD16 (or silk_ADD_SAT32/silk_SUB_SAT32) with Neon intrinsics.  That?s an obvious
2010 Sep 13
1
Small mistake in celt_types.h for MacOS X
Hi JM,
When porting my project to the Mac, I found that the definition for 
"celt_int16" and "celt_uint16" are wrong for the MacOS X Framework in 
celt_types.h, and need to be changed to "int16_t" and "u_int16_t" 
respectively. Just thought you ought to know.
John Ridges
2010 Nov 16
1
Possible bug in "pitch_downsample"
Hi Jean-Marc,
I could be way off base here, but it seems to me that line 115 in 
pitch.c in the function "pitch_downsample":
       x_lp[i] = 
SHR32(HALF32(HALF32(x[1][(2*i-1)]+x[1][(2*i+1)])+x[1][2*i]), SIG_SHIFT+2);
should actually be:
       x_lp[i] += 
SHR32(HALF32(HALF32(x[1][(2*i-1)]+x[1][(2*i+1)])+x[1][2*i]), SIG_SHIFT+2);
Sorry if I'm totally misreading things and just
2012 Mar 21
5
switch mode, how to give a public IP behing a NAT
Hi all,
I use tinc since 2 years between my MPLS sites in router mode, works
like a charm.
Today i am trying to make an ethernet bridge beetween 2 sites for video
conference needs, the raison is that 1 side is behind nat, and i dont
have access on the gate, other side is on public range. Because off H323
that doesn't handle unconfigured NAT, i would like to give a public IP
to the video
2015 Nov 12
2
[Aarch64 00/11] Patches to enable Aarch64
One other minor thing: I notice that in the inline assembly the result 
(rd) is constrained as an earlyclobber operand. What was the reason for 
that?
2010 Aug 18
1
The high complexity mode.
Hi Jean-Marc,
I'd just like to put in a vote that I wish you'd left in the 
high-complexity mode in CELT (with the assumption that it could be 
conditionally compiled out for the IETF standard codec). It seems like 
it makes it a more useful standalone codec in Xiph's arsenal, and from 
my own viewpoint I'm uncertain I'll be able to use the SILK codec 
because of the patent
2010 Dec 21
2
A Question about VBR
Congrats to the team for 0.10.0. It sounds really good in the tests I've 
done so far. I'm really looking forward to the 1.0 release.
One question though: could you explain briefly the difference between 
VBR and unconstrained VBR? And, in my case, the $64K question: is there 
any situation where CELT could produce more data than specified by 
nbCompressedBytes when encoding?
Thanks
2011 Mar 22
1
Please reinstate CELT_SET_SIGNALLING_REQUEST
Hi Jean-Marc,
I'd like to lobby to put CELT_SET_SIGNALLING_REQUEST back into the 
public area. In our case the frame sizes are constant and we're not 
trying to be inter-operable with anyone else, so the in-band signaling 
byte is just wasted bandwidth. I know I could just modify the default 
value for "signalling" in the source code, but I'm trying to avoid doing 
that as
2009 Jul 22
0
A technical question about the speex preprocessor.
Something looks odd without your values (or the doc) because hypergeom_gain()
should really approach 1 as x goes to infinity. But in the end, an
approximation is probably OK because denoising is anything but an exact science
:-)
   Jean-Marc
Quoting John Ridges <jridges at masque.com>:
> By my reckoning the confluent hypergoemetric functions should have the
> following values:
>
2015 Nov 13
0
[Aarch64 00/11] Patches to enable Aarch64
> On Nov 13, 2015, at 1:51 PM, John Ridges <jridges at masque.com> wrote:
> 
> Hi Jonathan,
> 
> I'm sorry to bring this up again, and I don't want to beat a dead horse, but I was very surprised by your benchmarks so I took a little closer look.
> 
> I think what's happening is that it's a little unfair to compare the ARM64 inline assembly to the C code,