similar to: [ANNOUNCE] xf86-video-xgi 1.5.0

Adam Jackson (10): Fix build on bigendian Don't include xf86Priv.h s/\<alloc\>/malloc/g Fix bAccessVGAPCIInfo to read when you tell it to Fix for new vgaHW ABI Fall back to shadowfb if XAA is unavailable Fix XGIValidMode for 1.13 API i2c: Don't scream on literally every single write to SCL or SDA ddc: Fix uncredible fail in

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Alex Deucher (7): ~ Initial version of the xgi driver (xgixp) for xgi xp10 chips ~ fix license formatting and remove old cvs tags ~ fix the build on AMD64 ~ remove cfb cruft ~ Un-libc-wrap. ~ clean up // comments, minor formatting cleanups ~ Remove Isa support Ian Romanick (188): ~ Modify XGIGetRec to return a

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Dear listener I'm having problem trying to setup a 640x480 image background with latest syslinux... the system start correctly but graphics is not shown at all... only text is visible... are there minimum requirements for a graphic extlinux background ? CPU is a Vortex86Sx (with no math processor) at 300MHz, 128MB RAM video card is a XGI Volari Z9s with 32MB RAM is there a way to

The automated tests seems not run periodically. Some builds are even broken (http://llvm.cs.uiuc.edu/testresults/X86-niobe/), and some failed (http://llvm.cs.uiuc.edu/testresults/SparcV9/). Will there be another automated test be scheduled before the next release? On 11/10/05, Bill Wendling <isanbard at gmail.com> wrote: > Frequently releasing software can be a good thing. Especially

2005/12/13, Chris Lattner <sabre at nondot.org>: > > For example, this a code snippet for the file generated by the TableGen tool: > ... > > Somewhere in my code, I have to write: > > unsigned opcode = MI->getOpcode(); // MachineInstr* > > if (CMPfaaaa == opcode || > > CMPfaaar == opcode || > > CMPfaara == opcode || > > ...

LiveInterval.cpp. // that v is live at i'. In this implementation intervals can have holes, // i.e. an interval might look like [1,20), [50,65), [1000,1001). Each // individual range is represented as an instance of LiveRange, and the whole // interval is represented as an instance of LiveInterval. What cause these holes? -- Tzu-Chien Chiu - XGI Technology, Inc. URL:

G'day, I am testing a new server with a Supermicro X7SBA motherboard and TE405 cards. When I load Dahdi and run dahdi_cfg I get the following errors: kernel: Uhhuh, NMI received for unknown reason b1 on CPU 0 You probably have a hardware problem with your RAM chips Dazed and confused, but trying to continue The reason codes I have seen are a0, a1, and

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Didn't SparcV9 backend implement list scheduling? 2005/12/16, Chris Lattner <sabre at nondot.org>: > On Thu, 15 Dec 2005, thean kiat sew wrote: > > I am planning to use list scheduling on LLVM instructions. > > Any recommendation on how to start ? As in which codes in LLVM that I need > > to look at. > > We don't currently have a list scheduler in the

A question about how the memory of object in LLVM are managed. I dived in some source files but still don't have any idea how the memory of MachineInstr object are managed. It doesn't look like reference counting. I'm writing an instruction scheudling code, the new order of MachineInstr* in a MachineBasicBlock is stored in a "schedule". All MachineInstr* in

2005/12/13, Chris Lattner <sabre at nondot.org>: > On Tue, 13 Dec 2005, Tzu-Chien Chiu wrote: > > > In my ISA, some registers are write-only. These registers serve as > > output ports, writing to these registers will output the values to an > > external device. They cannot be read. So their live intervals should > > not be joined with any other registers. >

Is anyone else seeing this ? John [root at maui ~]# yum update Loaded plugins: refresh-packagekit Setting up Update Process

we have just upgraded to xen4.0+kernel2.6.31.13. however, we fonud that disk offline in high disk IO(xen4.0+kernel2.6.31.13). but whitout xen4.0, we only start with kernel2.6.31.13, the disk offline didn''t happen. I think it is a bug. test case: 57 physical machine we start 5 vm(cpu:2, memory:1024) in a physical machine.at the same time we do decompression in dom0. tar xzvf *.tar.gz tar

In my ISA, some registers are write-only. These registers serve as output ports, writing to these registers will output the values to an external device. They cannot be read. So their live intervals should not be joined with any other registers. The only way I know to do this is defining several instruction 'templates' for an opcode (of course automatically generated by a script) similar

On Tue, May 20, 2008 at 6:55 AM, Keir Fraser <keir.fraser@eu.citrix.com> wrote: > Hey, I''m not on xen-users. Please post a new thread on xen-devel with a > clear explanation of the problem for those who haven''t seen the xen-users > context. ok. $$$ sez i get barked at for cross-posting ;-) > On 5/17/08, snowcrash+xen@gmail.com

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 It's a bit after 11pm, on the 11th day of the 11th month of the year, so what better time for a new release of X11! Release Candidate 1 of X11R7.6 has been posted at: http://www.x.org/releases/X11R7.6-RC1/ This includes all the source tar files for the versions of the modules currently considered part of the core release set (aka the