Displaying 20 results from an estimated 400 matches similar to: "htb thingy"
2009 Dec 28
2
Modified R Code
Dear R helpers,
I have following input files. (Actually they are more than 10 rates but here i am considering only 2 rates to write my problem)
rate1.csv
min1 max1 min2 max2 min3 max3
1.05 1.30 1.30 1.65 1.65 1.99
rate2.csv
min1 max1 min2 max2 min3
2004 Jan 19
0
problem with wrr+prio
I have set up wrr successfully on my bridge/shaper machine. That much
works fine. I originally used sfq in the inner classes. However, there
was a problem with high-bandwidth connections (web downloads,
bittorrent) starving low-bandwidth low-latency connections like ssh. I
would like to use prio or similar to prioritize the interactive traffic,
but it does not seem to work. I have tested with
2008 Apr 15
1
disturbing seed dependence in optim L-BFGS-B method
The the use of optim with the L-BFGS-B method for the following simple
function gives erroneous results. Any help appreciated!
Best,
Bob Reilly
# Code:
V=function(p){
p1=p[1];p2=p[2]
y=p1*p2-.4*(p1+p2)
return(-y)}
p=c(.2,.2) # p=c(.8,.8)
max=optim(p,V,method = "L-BFGS-B",lower=c(0,0),upper=c(1,1))
max1=optim(max$par,V,method = "L-BFGS-B",lower=c(0,0),upper=c(1,1))
2016 Apr 18
0
[PATCH v4 06/37] volt: parse the max voltage map entries
There are at least three "max" entries, which specify the max voltage. Because
they are actually normal voltage map entries, they can also be affected by the
temperature.
Nvidia respects those entries and if they get changed, nvidia uses the lower
voltage from both.
We shouldn't exceed those voltages at any given time.
v2: state what those entries do in the source
v3: add the
2016 Nov 08
2
should we have IR intrinsics for integer min/max?
Thanks, Hal and Matt for the feedback. As usual, my instincts about
canonicalization were probably wrong. :)
I thought that @max1 vs. @max3 would be viewed as an unknowable trade-off
between reducing the dependency chain and the pseudo-canonical min/max
form, so we'd add intrinsics, and defer that decision to the backend.
I'll wait to see if there are any other arguments presented.
2008 Jan 05
0
Help With WRR
Could anyone explain what is WRR param2 [wmode2 , incr2 , decr2 , min2] for ?
can i set just the param1 ? [wmode1 , incr1 , decr1,min1]
--
[]''s
Salatiel
"O maior prazer do inteligente é bancar o idiota
diante de um idiota que banca o inteligente".
2005 Oct 26
0
Explenation of WRR parameters
Guys
Oppologies for the cross post.
I''ve been scouring the docs coming with the wrr patches and for the
life of me I can''t figure out why there are 8 parameters for each
class.
<snip>
weight1, min1, decr1, incr1,
weight2, min2, decr2, incr2
</snip>
According to the docs these parameters are handled the same way, but
looking at the example scripts there are
2012 Jan 27
3
Subsetting for the ten highest values by group in a dataframe
Hello,
I am looking for a way to subset a data frame by choosing the top ten
maximum values from that dataframe. As well this occurs within some
factor levels.
## I've used plyr here but I'm not married to this approach
require(plyr)
## I've created a data.frame with two groups and then a id variable (y)
df <- data.frame(x=rnorm(400, mean=20), y=1:400,
2016 Nov 07
5
should we have IR intrinsics for integer min/max?
Hi -
The answer to this question may help to resolve larger questions about
intrinsics and vectorization that were discussed at the dev mtg last week,
but let's start with the basics:
Which, if any, of these is the canonical IR?
; ret = x < y ? 0 : x-y
define i32 @max1(i32 %x, i32 %y) {
%sub = sub nsw i32 %x, %y
%cmp = icmp slt i32 %x, %y ; cmp is independent of sub
%sel = select
2009 Jun 04
3
Fast way of finding top-n values of a long vector
If x is a (long) vector and n << length(x), what is a fast way of
finding the top-n values of x?
Some suggestions (calculating the ratio of the two top values):
library("rbenchmark")
set.seed(1); x <- runif(1e6, max=1e7); x[1] <- NA;
benchmark(
replications=20,
columns=c("test","elapsed"),
order="elapsed"
, sort = {a<-sort(x,
2009 Oct 14
0
[PATCH 3/7] nv50: submit user vbo data through the fifo
Requesting a new real buffer from the kernel and
copying all the data is wasteful e.g. if only a
few (but widely spread) vertices are accessed.
---
src/gallium/drivers/nv50/nv50_context.h | 3 +
src/gallium/drivers/nv50/nv50_vbo.c | 409 +++++++++++++++++++++++++++++--
2 files changed, 394 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/nv50/nv50_context.h
2015 Oct 10
2
[PATCH] nv50, nvc0: don't base decisions on available pushbuf space
On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> This patch looks fine except that it should be a bit more normalized. I
> mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for
> PUSH_SPACE calls, sometimes you add it sometimes not.
Meh. We need to get our error checking situation straight, but this
isn't the patch to
2015 Oct 10
3
[PATCH] nv50, nvc0: don't base decisions on available pushbuf space
We still have to push everything out, might as well kick earlier and
flip pushbufs when we know we'll need it. This resolves some issues with
the new policy of making sure that we always leave a bit of room at the
end for fences.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv50/nv50_shader_state.c | 9
2016 Mar 21
0
[PATCH v2 06/22] volt: parse the both max voltage entries
these entries specify a maximum voltage nvidia never exceeds, we shouldn't do
that, too.
Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
drm/nouveau/include/nvkm/subdev/bios/vmap.h | 2 ++
drm/nouveau/include/nvkm/subdev/volt.h | 2 ++
drm/nouveau/nvkm/subdev/bios/vmap.c | 5 +++++
drm/nouveau/nvkm/subdev/volt/base.c | 11 +++++++++++
4 files
2016 Mar 28
1
[PATCH v2 06/22] volt: parse the both max voltage entries
On 21/03/16 18:16, Karol Herbst wrote:
> these entries specify a maximum voltage nvidia never exceeds, we shouldn't do
> that, too.
>
> Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
> ---
> drm/nouveau/include/nvkm/subdev/bios/vmap.h | 2 ++
> drm/nouveau/include/nvkm/subdev/volt.h | 2 ++
> drm/nouveau/nvkm/subdev/bios/vmap.c | 5
2024 Jan 25
1
enable strong KexAlgorithms, Ciphers and MACs in /etc/ssh/sshd_config file on RHEL 8.x Linux OS
Hi Kaushal,
I maintain a set of SSH hardening guides for various platforms,
including RHEL 8. You can find them here:
https://ssh-audit.com/hardening_guides.html
- Joe
--
Joseph S. Testa II
Founder & Principal Security Consultant
Positron Security
On Thu, 2024-01-25 at 18:39 +0530, Kaushal Shriyan wrote:
> Hi,
>
> I am running the below servers on Red Hat Enterprise
2012 Jun 11
1
[PATCH 10/21] nouveau: Add support for ARB_sampler_object
ARB_sampler_object is very simple software only extension to support.
I want to make it mandator extension for Mesa drivers to allow meta
module to use it.
This patch add support for the extension to nouveau. It is completely
untested search and replace patch. I hope someone with old NV hardware
could give a try that there is no regressions and ARB_sampler_object
tests passes.
Signed-off-by:
2010 Jan 18
1
[PATCH 1/2] nv30-nv40: Rewrite primitive splitting and emission
The current code for primitive splitting and emission on pre-nv50 is
severely broken.
In particular:
1. Quads and lines are totally broken because "&= 3" should be "&= ~3"
and similar for lines
2. Triangle fans and polygons are broken because the first vertex
must be repeated for each split chunk
3. Line loops are broken because the must be converted to a line strip,
2017 Jan 23
1
[PATCH] virtio_net: fix PAGE_SIZE > 64k
I don't have any guests with PAGE_SIZE > 64k but the
code seems to be clearly broken in that case
as PAGE_SIZE / MERGEABLE_BUFFER_ALIGN will need
more than 8 bit and so the code in mergeable_ctx_to_buf_address
does not give us the actual true size.
Cc: John Fastabend <john.fastabend at gmail.com>
Signed-off-by: Michael S. Tsirkin <mst at redhat.com>
---
Lightly tested on x86
2017 Jan 23
1
[PATCH] virtio_net: fix PAGE_SIZE > 64k
I don't have any guests with PAGE_SIZE > 64k but the
code seems to be clearly broken in that case
as PAGE_SIZE / MERGEABLE_BUFFER_ALIGN will need
more than 8 bit and so the code in mergeable_ctx_to_buf_address
does not give us the actual true size.
Cc: John Fastabend <john.fastabend at gmail.com>
Signed-off-by: Michael S. Tsirkin <mst at redhat.com>
---
Lightly tested on x86