similar to: [PATCH v3] xen/gic: EOI irqs on the right pcpu

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

If the vgic needs to inject a virtual irq into the guest, but no free LR registers are available, add the irq to a list and return. Whenever an LR register becomes available we add the queued irq to it and remove it from the list. We use the gic lock to protect the list and the bitmask. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- xen/arch/arm/gic.c |

Print some useful GIC debug information when arch_dump_domain_info is called (''q'' debug key). Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- xen/arch/arm/domain.c | 6 ++++++ xen/arch/arm/gic.c | 27 +++++++++++++++++++++++++++ xen/include/asm-arm/gic.h | 3 +++ 3 files changed, 36 insertions(+), 0 deletions(-) diff --git

Rename the existing gic_dump_info to gic_dump_info_guest reduce confusion. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> --- v2: s/gic_dump_info/gic_dump_info_guest/ --- xen/arch/arm/domain.c | 2 +- xen/arch/arm/gic.c | 77 ++++++++++++++++++++++++++++++++++++++++++++- xen/include/asm-arm/gic.h | 2 +- 3 files changed, 78 insertions(+), 3 deletions(-) diff

Check for: - uninitialized GIC interface addresses; - non-page aligned GIC interface addresses. Panic in both cases. Also remove the code from GICH and GICC to handle non-page aligned interfaces. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 8efbeb3..2b29e7e 100644 --- a/xen/arch/arm/gic.c +++

Some hardware models (e.g. Dell Studio 1555 laptops) require calls to the firmware to be issued on cpu 0 only. As Dom0 might have to use these calls, add xen_pin_vcpu() to achieve this functionality. In case either the domain doesn't have the privilege to make the related hypercall or the hypervisor isn't supporting it, issue a warning once and disable further pinning attempts.

On 05/04/16 11:45, David Vrabel wrote: > On 05/04/16 06:10, Juergen Gross wrote: >> Some hardware models (e.g. Dell Studio 1555 laptops) require calls to >> the firmware to be issued on cpu 0 only. As Dom0 might have to use >> these calls, add xen_pin_vcpu() to achieve this functionality. >> >> In case either the domain doesn't have the privilege to make the

See: https://bugzilla.redhat.com/show_bug.cgi?id=1339977 --- src/launch-direct.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/launch-direct.c b/src/launch-direct.c index 20f6471..6450d7e 100644 --- a/src/launch-direct.c +++ b/src/launch-direct.c @@ -382,9 +382,12 @@ launch_direct (guestfs_h *g, void *datav, const char *arg) MACHINE_TYPE

We are currently initializing GIC irq properties (ITARGETSR, IPRIORITYR, and GICD_ICFGR) only in gic_route_irq, that is not called for guest interrupts at all. Move the initialization into a separate function (gic_set_irq_properties) and call it from gic_route_irq_to_guest. Changes in v2: - rebased on 77d3a1db3196b1b5864469f8d3f41d496800c795. Signed-off-by: Stefano Stabellini

On 05/04/16 06:10, Juergen Gross wrote: > Some hardware models (e.g. Dell Studio 1555 laptops) require calls to > the firmware to be issued on cpu 0 only. As Dom0 might have to use > these calls, add xen_pin_vcpu() to achieve this functionality. > > In case either the domain doesn't have the privilege to make the > related hypercall or the hypervisor isn't supporting it,

On 05/04/16 06:10, Juergen Gross wrote: > Some hardware models (e.g. Dell Studio 1555 laptops) require calls to > the firmware to be issued on cpu 0 only. As Dom0 might have to use > these calls, add xen_pin_vcpu() to achieve this functionality. > > In case either the domain doesn't have the privilege to make the > related hypercall or the hypervisor isn't supporting it,

In the GIC manual, the number of interrupt lines is computed with the following formula: 32(N + 1) where N is the value retrieved from GICD_TYPER. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/gic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 760c86b..389c217 100644 ---

George has release acked all of these. Otherwise mostly minor updates this time around. Summary: A == acked, M == modified A xen: arm64: Add 8250 earlyprintk support A xen: arm64: Add Basic Platform support for APM X-Gene Storm. A xen: arm64: Add APM implementor id to processor implementers. M xen: arm: add a quirk to handle platforms with unusual GIC layout A xen: arm: allow platform

# This is a BitKeeper generated diff -Nru style patch. # # ChangeSet # 2005/05/01 17:01:17-07:00 kmacy@curly.lab.netapp.com # add SMP support to evtchn # Signed-off-by: Kip Macy <kmacy@netapp.com> # # freebsd-5.3-xen-sparse/i386-xen/include/xen_intr.h # 2005/05/01 17:01:15-07:00 kmacy@curly.lab.netapp.com +3 -0 # add SMP interfaces # #

Hi, I have found the cpu time partitioning based on cpu shares weights not very intuitive. On RHEL64, I deployed two qemu/kvm VMs VM1 with 1 vcpu and 512 cpu shares VM2 with 2 vcpus and 1024 cpu shares I pinned their vcpus to specific host pcpus: VM1 vcpu 0 to host pcpu1 VM2 vcpu 0 to host pcpu1, VM2 vcpu 1 to host pcpu2 I executed inside the VMs a simple process that consume all

We weren''t taking the guest mode (CPSR) into account and would always access the user version of the registers. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> --- v2: Fix r8 vs r8_fiq thinko. --- xen/arch/arm/traps.c | 62 ++++++++++++++++++++++++++++++++++++++++++- xen/arch/arm/vgic.c | 4 +- xen/arch/arm/vpl011.c | 4 +- xen/arch/arm/vtimer.c

Direct calls perform better, so we should prefer them and use indirect ones only when there indeed is a need for indirection. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -1373,7 +1373,7 @@ void error_interrupt(struct cpu_user_reg void pmu_apic_interrupt(struct cpu_user_regs *regs) { ack_APIC_irq(); -

In this patch, we change read_segment_register to take vcpu and regs parameters for PVH (in upcoming patches). No functionality change. also, make emulate_privileged_op() public for later. Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com> diff -r 93d95f6dd693 -r 0339f85f6068 xen/arch/x86/domain.c --- a/xen/arch/x86/domain.c Fri Jan 11 16:22:57 2013 -0800 +++ b/xen/arch/x86/domain.c

mk_pirq_info(), gsi_from_irq() and vector_from_irq() are static functions and no one is calling them. This fixed following compilation warnings : drivers/xen/events.c:134: warning: ?mk_pirq_info? defined but not used drivers/xen/events.c:180: warning: ?gsi_from_irq? defined but not used drivers/xen/events.c:190: warning: ?vector_from_irq? defined but not used Signed-off-by: Jaswinder

mk_pirq_info(), gsi_from_irq() and vector_from_irq() are static functions and no one is calling them. This fixed following compilation warnings : drivers/xen/events.c:134: warning: ?mk_pirq_info? defined but not used drivers/xen/events.c:180: warning: ?gsi_from_irq? defined but not used drivers/xen/events.c:190: warning: ?vector_from_irq? defined but not used Signed-off-by: Jaswinder