similar to: [PATCH v2 2/2] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD

Displaying 20 results from an estimated 200 matches similar to: "[PATCH v2 2/2] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD"

2013 Mar 14
1
[PATCH] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
Currently number of error reporting register banks is hardcoded to 6 on AMD processors. This may break in virtualized scenarios when a hypervisor prefers to report fewer banks that the physical HW provides. Since number of supported banks is reported in MSR_IA32_MCG_CAP[7:0] that''s what we should use. Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> ---
2013 Mar 14
1
[PATCH v2 0/2] AMD MCE fixes
Boris, Here is the updated patch for determining number of regiter banks on AMD plus a patch removing shared_bank array, as you suggested. Offline/online testing didn''t show any issues. Boris Ostrovsky (2): x86/mce: Replace shared_bank array with is_shared_bank() helper x86/mce: Use MCG_CAP MSR to find out number of banks on AMD arch/x86/kernel/cpu/mcheck/mce_amd.c | 38
2013 Jul 15
1
[PATCH] xen/arm: Dummy implementation of multi-bank support
U-boot for the arndale board splits the memory in 8 contiguous banks and rewrites the memory node. So most of the memory is lost. As the frametable is only able to handle contiguous memory, use the first contiguous banks and warn if some of the memory banks are not used. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/setup.c | 23 +++++++++++++++++------ 1 file
2019 Mar 19
0
[PATCH nbdkit 3/9] server: Implement Block Status requests to read allocation status.
This commit implements the core NBD protocol for the "base:allocation" Block Status replies. --- server/internal.h | 7 + server/protocol.h | 17 +- server/protocol-handshake-newstyle.c | 79 ++++++++- server/protocol.c | 248 +++++++++++++++++++++++++-- 4 files changed, 335 insertions(+), 16 deletions(-) diff --git
2013 Jun 25
0
Re: [PATCH] Add read support for "big data" blocks to hivex
On Sun, Jun 23, 2013 at 08:52:05PM +0200, Hilko Bengen wrote: > --- > lib/hivex.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++++------------ > 1 file changed, 66 insertions(+), 15 deletions(-) > > diff --git a/lib/hivex.c b/lib/hivex.c > index efc27f8..e3c1e05 100644 > --- a/lib/hivex.c > +++ b/lib/hivex.c > @@ -208,6 +208,19 @@ struct ntreg_sk_record { >
2013 Jun 25
0
[PATCH] Add read support for "big data" blocks to hivex
Large values are split into multiple blocks. References to these sub-blocks are kept in a list whose structure seems to be identical to a value list. A "db" record contains information on the number of sub-blocks and a pointer to the list. It is referenced by the vk record. I came across this when comparing the contents of HKLM\SOFTWARE hives from Windows7 systems and finding that
2013 Jun 23
3
[PATCH] Add read support for "big data" blocks to hivex
--- lib/hivex.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 66 insertions(+), 15 deletions(-) diff --git a/lib/hivex.c b/lib/hivex.c index efc27f8..e3c1e05 100644 --- a/lib/hivex.c +++ b/lib/hivex.c @@ -208,6 +208,19 @@ struct ntreg_sk_record { char sec_desc[1]; /* security info follows */ } __attribute__((__packed__)); +struct
2019 Jun 07
0
[nbdkit PATCH v2 2/2] server: Group related transmission send()s
We disabled Nagle's algorithm to allow less latency in our responses reaching the client; but as a side effect, it leads to more network overhead when we send a reply split across more than one write(). Take advantage of various means for grouping related writes (Linux' MSG_MORE for sockets, gnutls' corking for TLS) to send a larger packet, and adjust callers to pass in our internal
2019 Jan 01
0
[PATCH nbdkit v2 1/4] common/bitmap: Add bitmap_next function and tests.
It's useful to be able to search for the next non-zero entry in a bitmap. This commit adds a ?bitmap_next? function to do that. Because the bitmap is just a uint8_t buffer, using fast string functions we should be able to do this quickly even if the bitmap is sparse. (However the actual implementation is not optimized since that is quite complicated - see to-do comments in
2019 Sep 24
0
[PATCH nbdkit 3/4] common/protocol: Update nbd-protocol.h so it matches libnbd’s copy.
Diff against libnbd’s copy of this file, and change this one until it matches. --- common/protocol/nbd-protocol.h | 76 +++++++++++++++++----------- server/protocol-handshake-newstyle.c | 26 +++++----- server/protocol-handshake-oldstyle.c | 4 +- server/protocol.c | 25 ++++----- tests/test-layers.c | 14 ++--- 5 files changed, 81 insertions(+), 64
2019 Mar 23
1
Re: nbdkit & qemu 2.12: qemu-img: Protocol error: simple reply when structured reply chunk was expected
Adding some cc's; my reply truncates, so if you want to catch up to the full original mail, see https://www.redhat.com/archives/libguestfs/2019-March/msg00124.html On 3/23/19 12:00 PM, Richard W.M. Jones wrote: > On Sat, Mar 23, 2019 at 09:52:41AM -0500, Eric Blake wrote: >> On 3/23/19 7:58 AM, Richard W.M. Jones wrote: >>> NB During this I discovered another (but minor) bug
2007 Aug 27
3
[PATCH] Limit MCG Cap
Intercept guest reads of MSR_IA32_MCG_CAP and limit the number of memory banks reported to one. This prevents us from trying to read status of non-existent banks when migrated to a machine with fewer banks. Signed-off-by: Ben Guthro Signed-off-by: David Lively <dlively@virtualiron.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com
2019 Nov 02
2
[PATCH nbdkit] server: Use GCC hints to move debug and error handling code out of hot paths.
For GCC only, define unlikely() macro. Use it on error paths to move code out of the hot path. In the server only, use the debug() macro (don't call nbdkit_debug directly). This macro checks the verbose flag and moves the call to nbdkit_debug out of the hot path. --- server/connections.c | 11 ++++++----- server/internal.h | 17 ++++++++++++++++- server/plugins.c | 2 +-
2012 Jun 27
18
[xen vMCE RFC V0.2] xen vMCE design
Hi, This is updated xen vMCE design foils, according to comments from community recently. This foils focus on vMCE part of Xen MCA, so as Keir said, it''s some dense. Later Will will present a document to elaborate more, including Intel MCA and surrounding features and Xen implementation. Thanks, Jinsong
2013 Mar 12
14
vpmu=1 and running 'perf top' within a PVHVM guest eventually hangs dom0 and hypervisor has stuck vCPUS. Romley-EP (model=45, stepping=2)
This issue I am encountering seems to only happen on multi-socket machines. It also does not help that the only multi-socket box I have is an Romley-EP (so two socket SandyBridge CPUs). The other SandyBridge boxes I''ve (one socket) are not showing this. Granted they are also a different model (42). The problem is that when I run ''perf top'' within an SMP PVHVM guest,
2007 Aug 16
4
[PATCH] small mca cleanup
Hi! The MCG_CAP MSR never returns a negative count of available error-reporting banks. Thus make nr_mce_banks unsigned. While here, do some other minor cleanups. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Geschäftsanschrift):
2010 Mar 23
0
[PATCH] x86: s3: ensure CR4.MCE is enabled after mcheck_init()
Changeset 21045: 7751288b1386 introduces a potential issue: CR4.MCE is enabled before mcheck_init() -- thought looks I don''t meet with an actual issue with this, we''d better fix it. Thanks, -- Dexuan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2009 Jun 03
0
TINY MCE Jrails media upload
Hi Can anybody give me idea to do media upload in rails using tiny_mce and jrails ? Thanks ! -- Ruby on Rails Developer http://sandip.sosblog.com http://funonrails.wordpress.com www.joshsoftware.com --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "Ruby on Rails: Talk" group. To post to this group, send
2012 Oct 26
0
[PATCH] MCE: Allow AMD MSRs injected via xen-mceinj
Allow AMD MSRs injected via xen-mceinj Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85689 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632
2016 Jan 22
0
Bug#812166: [PATCH] x86/mce: fix misleading indentation in init_nonfatal_mce_checker().
On 22/01/16 14:38, Ian Campbell wrote: > Debian bug 812166[0] reported this build failure due to > Wmisleading-indentation with gcc-6: > > non-fatal.c: In function 'init_nonfatal_mce_checker': > non-fatal.c:103:2: error: statement is indented as if it were guarded by... [-Werror=misleading-indentation] > switch (c->x86_vendor) { > ^~~~~~ > >