similar to: [PATCH v2 2/2] xen/arm: initialize the GIC irq properties of interrupts routed to guests

Rename the existing gic_dump_info to gic_dump_info_guest reduce confusion. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> --- v2: s/gic_dump_info/gic_dump_info_guest/ --- xen/arch/arm/domain.c | 2 +- xen/arch/arm/gic.c | 77 ++++++++++++++++++++++++++++++++++++++++++++- xen/include/asm-arm/gic.h | 2 +- 3 files changed, 78 insertions(+), 3 deletions(-) diff

Hi, This is the fifth version of this patch series. With the Versatile Express TC2, it''s possible to boot only with A7 or A15. If the user choose to boot with only A7, the CPU ID will start at 0x100. As Xen relies on it to set the logical ID and the GIC, it won''t be possible to use Xen with this use case. This patch series is divided in 3 parts: - Patch 1: prepare Xen

In the GIC manual, the number of interrupt lines is computed with the following formula: 32(N + 1) where N is the value retrieved from GICD_TYPER. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/gic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 760c86b..389c217 100644 ---

Currently IRQs routing is initialized to the wrong register and overwrites interrupt configuration register (ICFGRn). Reported-by: Sander Bogaert <sander.bogaert@elis.ugent.be> Signed-off-by: Julien Grall <julien.grall@linaro.org> --- Changes in v2: - cpumask was already good... --- xen/arch/arm/gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

(moving to xen-devel, xen-arm is for the older PV ARM port) On Tue, 2013-06-25 at 23:59 +0000, Eric Trudeau wrote: > Hi, I am trying to build the XEN tools for our port of XEN to our > Cortex A15-based platform. > > I am using the repo at git://xenbits.xenproject.org/xen.git to > cross-compile the tools into our rootfs. Which branch/changeset are you using? I've heard that

I''m afraid this series is rather a grab bag and it is distressingly large at this stage. With this series I can boot an Xgene board until it fails to find its SATA controller. This is a dom0 issue for which patches are pending from APM (/me nudges Anup). As well as the APM specific platform stuff there are also some generic improvements which were either necessary or useful during this

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Check for: - uninitialized GIC interface addresses; - non-page aligned GIC interface addresses. Panic in both cases. Also remove the code from GICH and GICC to handle non-page aligned interfaces. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 8efbeb3..2b29e7e 100644 --- a/xen/arch/arm/gic.c +++

This patch series implements SMP boot for arch/arm, as far as getting all CPUs up and running the idle loop. Changes from v1: - moved barriers out of loop in udelay() - dropped broken GIC change in favour of explanatory comment - made the increment of ready_cpus atomic (I couldn''t move the increment to before signalling the next CPU because the PT switch has to happen between

Print some useful GIC debug information when arch_dump_domain_info is called (''q'' debug key). Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- xen/arch/arm/domain.c | 6 ++++++ xen/arch/arm/gic.c | 27 +++++++++++++++++++++++++++ xen/include/asm-arm/gic.h | 3 +++ 3 files changed, 36 insertions(+), 0 deletions(-) diff --git

See: https://bugzilla.redhat.com/show_bug.cgi?id=1339977 --- src/launch-direct.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/launch-direct.c b/src/launch-direct.c index 20f6471..6450d7e 100644 --- a/src/launch-direct.c +++ b/src/launch-direct.c @@ -382,9 +382,12 @@ launch_direct (guestfs_h *g, void *datav, const char *arg) MACHINE_TYPE

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

This adds an smp_ops for voyager, and hooks things up appropriately. This is the first baby-step to making subarch runtime switchable. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Eric W. Biederman <ebiederm@xmission.com> --- arch/i386/kernel/Makefile | 1 arch/i386/kernel/smp.c

This adds an smp_ops for voyager, and hooks things up appropriately. This is the first baby-step to making subarch runtime switchable. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Eric W. Biederman <ebiederm@xmission.com> --- arch/i386/kernel/Makefile | 1 arch/i386/kernel/smp.c

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

From: Sebastien Boeuf <sebastien.boeuf at intel.com> Virtio defines 'shared memory regions' that provide a continuously shared region between the host and guest. Provide a method to find a particular region on a device. Signed-off-by: Sebastien Boeuf <sebastien.boeuf at intel.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert at redhat.com> Acked-by: Michael S.

? 2023/3/23 13:30, Xie Yongji ??: > Since virtio-vdpa bus driver already support interrupt > affinity spreading mechanism, let's implement the > set_vq_affinity callback to bring it to vduse device. > After we get the virtqueue's affinity, we can spread > IRQs between CPUs in the affinity mask, in a round-robin > manner, to run the irq callback. > > Signed-off-by:

On Tue, Feb 28, 2023 at 5:42?PM Xie Yongji <xieyongji at bytedance.com> wrote: > > This introduces set_irq_affinity callback in > vdpa_config_ops so that vdpa device driver can > get the interrupt affinity hint from the virtio > device driver. The interrupt affinity hint would > be needed by the interrupt affinity spreading > mechanism. > > Signed-off-by: Xie

Introduce Cortex-A7 with a scalable proc_info_list which including cpu id and cpu initialize function. In head.S, search cpu specific MIDR in procinfo and call such initialize function. Currently, support Cortex-A7 and Cortex-A15. Signed-off-by: Bamvor Jian Zhang <bjzhang@suse.com> --- changes since v2 1), define cpu_init function instead of assemble jump code in struct proc_info_list 2),