similar to: [PATCH V3] vmx/nmi: Do not use self_nmi() in VMEXIT handler

xen/arch/x86/crash.c | 116 ++++++++++++++++++++++++++++++++++----- xen/arch/x86/machine_kexec.c | 19 ++++++ xen/arch/x86/x86_64/entry.S | 34 +++++++++++ xen/include/asm-x86/desc.h | 45 +++++++++++++++ xen/include/asm-x86/processor.h | 4 + 5 files changed, 203 insertions(+), 15 deletions(-) Experimentally, certain crash kernels will triple fault very early

Hi I am using oprofile 0.9.3 on xen cs 16540 on an Intel system. When I look at the top "hot" functions, I see p2m_change_type being one of the top function in xen-syms. This function is only in the svm (AMD) code and should not appear on an Intel system. I see that this function is not being clled at all when I am running my apps as I have put printk in the functions and they do

Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),

This set of patches converts the way frames gets created from using PUSHes/POPs to using MOVes, thus allowing (in certain cases) to avoid saving/restoring part of the register set. While the place where the (small) win from this comes from varies between CPUs, the net effect is a 1 to 2% reduction on a combined interruption entry and exit when the full state save can be avoided. 1: use MOV

Xen/MCE: vMCE injection In our test for win8 guest mce, we find a bug that no matter what SRAO/SRAR error xen inject to win8 guest, it always reboot. The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs). This patch fix vMCE injection bug, injecting vMCE# to all vcpus. Signed-off-by: Liu,

On Tue, Feb 11, 2020 at 5:53 AM Joerg Roedel <joro at 8bytes.org> wrote: > > From: Joerg Roedel <jroedel at suse.de> > > Keep NMI state in SEV-ES code so the kernel can re-enable NMIs for the > vCPU when it reaches IRET. This patch is overcomplicated IMO. Just do the magic incantation in C from do_nmi or from here: /* * For ease of testing, unmask

From: Yang Zhang <yang.z.zhang@Intel.com> The following patches fix the issue that fail to boot L2 guest on APIC-v available machine. The main problem is that with APIC-v, virtual interrupt inject L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running, L1 will detect interrupt through vmexit with reason external interrupt. If this happens, we should update

One could even debate whether reserved bit faults are always fatal (and should never be propagated to the guest)... Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: 2008-01-28/xen/arch/x86/traps.c =================================================================== --- 2008-01-28.orig/xen/arch/x86/traps.c 2008-01-28 11:31:44.000000000 +0100 +++ 2008-01-28/xen/arch/x86/traps.c

I recently realized that the original way of dealing with the DebugCtl MSR on VMX failed to make use of the dedicated guest VMCS field. This is being fixed with this patch. What is puzzling me to a certain degree is that while there is a guest VMCS field for this MSR, there''s no equivalent host load field, but there''s also no indication that the MSR would be cleared during a

It seems that all current callers have interrupts enabled, making the code currently safe but dangerous. Also, fix a trailing whitespace issue. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> diff -r 8b93ac0c93f3 -r f3adcb7d84ea xen/arch/x86/nmi.c --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -482,13 +482,14 @@ void nmi_watchdog_tick(struct cpu_user_r * 8-3 and 8-4 in

This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length

Hello, A friend of mine was having weird ocasional crashes on migration, and I took a look at the problem The VM is a very stripped down ubuntu 12.04 environment (3.2.0 kernel) with a total of 96MB of RAM, but this appears to be a generic driver problem still present in upstream. The symptoms were that on about 5% of migrations, one or more block devices would fail to come back on resume. The

On Tue, Feb 11, 2020 at 03:50:08PM +0100, Peter Zijlstra wrote: > Oh gawd; so instead of improving the whole NMI situation, AMD went and > made it worse still ?!? Well, depends on how you want to see it. Under SEV-ES an IRET will not re-open the NMI window, but the guest has to tell the hypervisor explicitly when it is ready to receive new NMIs via the NMI_COMPLETE message. NMIs stay

On Tue, Feb 11, 2020 at 03:50:08PM +0100, Peter Zijlstra wrote: > Oh gawd; so instead of improving the whole NMI situation, AMD went and > made it worse still ?!? Well, depends on how you want to see it. Under SEV-ES an IRET will not re-open the NMI window, but the guest has to tell the hypervisor explicitly when it is ready to receive new NMIs via the NMI_COMPLETE message. NMIs stay

Hello, While working on a fix for the rare-but-possible problem of reentrant NMIs and MCEs, I have discovered that it is sadly possible to generate fake NMIs and MCEs which will run the relevant handlers on the relevant stacks, without invoking any of the other CPU logic for these special interrupts. A fake NMI can be generated by a processor in PIC mode as opposed to Virtual wire mode, with a

R-helpers: I have a dataset that has 168 subjects and 12 variables. Some of the variables have missing data and I want to use the multiple imputation capabilities of the "mice" package to address the missing data. Given that mice only supports linear models and generalized linear models (via the lm.mids and glm.mids functions) and that I need to fit Cox models, I followed the previous

I am working with some survival data with missing values. I am using the mice package to do multiple imputation. I have found code in this thread which handles pooling of the MI results: https://stat.ethz.ch/pipermail/r-help/2007-May/132180.html Now I would like to plot a survival curve using the pooled results. Here is a reproducible example: require(survival) require(mice) set.seed(2) dt

I have an Intel e1000e NIC which I put into passthrough for an HVM domain under Xen 4.2. All the corresponding hardware protections are enabled on my system (DMA + Interrupt remapping), however, once in a while I get a SERR NMI in dom0 (NMI - PCI sys error (SERR) in xl dmesg). I am wondering about its exact reason. I am thinking in the following way: [+] Under Intel VT-x, interrupts are

Here is a problem that perhaps someone out here has an idea about. It vaguely reminds me of something I've seen before, but can't place. Can anyone help? For multiple imputation, there are simpler methods available if the patterns of missing data are 'monotone' --- if Vj is missing then all variables Vk, k>j are also missing, vs. more complex methods required when the

Hi everyone, Does anyone here has experience using MICE to impute missing value? I am having problem to pool the imputed dataset for a MANOVA test, could you give me some advice please? Here is my code: > library(mice) >