Displaying 20 results from an estimated 1000 matches similar to: "[PATCH] x86/mwait-idle: enable Ivy Bridge Xeon support"
2013 Aug 29
7
[PATCH 0/3] x86: mwait_idle improvements ported from Linux
1: x86/mwait_idle: remove assumption of one C-state per MWAIT flag
2: x86/mwait_idle: export both C1 and C1E
3: x86/mwait_idle: initial C8, C9, C10 support
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2011 Nov 03
2
xen-unstable fails to boot on a system with Ivy Bridge stepping C0 cpu
Hi,
I need a help with tracking down following issue:
When trying to boot Xen on a system with Ivy Bridge stepping C0 CPU, it is stuck on CPU initialization.
I''ve added some tracing to apic writes/reads and traced it so far to sending INIT IPI.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging detected.
(XEN) Setting warm reset code and vector.
(XEN) apic_wrmsr (0x280,0x0)
2011 Aug 15
36
expose MWAIT to dom0
There''re basically two methods to enter a given C-state: legacy (hlt + I/O read),
and native(using mwait). MWAIT is always preferred when both underlying CPU
and OS support, which is a more efficient way to conduct C-state transition.
Xen PM relies on Dom0 to parse ACPI Cx/Px information, which involves one
step to notify BIOS about a set of capabilities supported by OSPM. One capability
2020 Jun 11
2
[PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events
On Thu, Jun 11, 2020 at 03:10:45PM +0200, Joerg Roedel wrote:
> On Tue, May 19, 2020 at 11:38:45PM -0700, Sean Christopherson wrote:
> > On Tue, Apr 28, 2020 at 05:17:09PM +0200, Joerg Roedel wrote:
> > > +static enum es_result vc_handle_monitor(struct ghcb *ghcb,
> > > + struct es_em_ctxt *ctxt)
> > > +{
> > > + phys_addr_t monitor_pa;
> >
2020 Jun 11
2
[PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events
On Thu, Jun 11, 2020 at 03:10:45PM +0200, Joerg Roedel wrote:
> On Tue, May 19, 2020 at 11:38:45PM -0700, Sean Christopherson wrote:
> > On Tue, Apr 28, 2020 at 05:17:09PM +0200, Joerg Roedel wrote:
> > > +static enum es_result vc_handle_monitor(struct ghcb *ghcb,
> > > + struct es_em_ctxt *ctxt)
> > > +{
> > > + phys_addr_t monitor_pa;
> >
2020 Apr 10
2
Status of GF108GLM [NVS 5200M]
Hi, Ilia.
Sorry for such a big delay in answering. Real life and that stuff...
I am a newcomer so, please, if I do something wrong regarding my
quoting style or whatever, just let me know and I'll quickly improve. :)
El lun., 30 mar. 2020 a las 13:38, Ilia Mirkin
(<imirkin at alum.mit.edu>) escribi?:
>
> Yes, GF108 is Fermi (F = Fermi). Reclocking is currently not available
>
2008 Jun 16
0
[PATCH] x86: Back port from latest Linux kernel to enable C2/C3 entry via MWAIT
Current xen-linux (2.6.18) not include support for Cx MWAIT entry
method. Back port from latest Linux kernel (already there since 2.6.23).
Without this patch, _CST method couldn''t get C states with FFH address
space type.
Signed-off-by: Wei Gang <gang.wei@intel.com>
Jimmy
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
2017 Dec 31
1
Order of methods for optimx
Dear R-er,
For a non-linear optimisation, I used optim() with BFGS method but it
stopped regularly before to reach a true mimimum. It was not a problem
with limit of iterations, just a local minimum. I was able sometimes to
reach better minimum using several rounds of optim().
Then I moved to optimx() to do the different optim rounds automatically
using "Nelder-Mead" and
2020 Apr 10
0
Status of GF108GLM [NVS 5200M]
On Fri, Apr 10, 2020 at 2:06 PM Jes?s J. Guerrero Botella
<jesus.guerrero.botella at gmail.com> wrote:
>
> Hi, Ilia.
>
> Sorry for such a big delay in answering. Real life and that stuff...
>
> I am a newcomer so, please, if I do something wrong regarding my
> quoting style or whatever, just let me know and I'll quickly improve. :)
Perfect so far!
>
> El
2020 May 20
2
[PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events
On Tue, Apr 28, 2020 at 05:17:09PM +0200, Joerg Roedel wrote:
> From: Tom Lendacky <thomas.lendacky at amd.com>
>
> Implement a handler for #VC exceptions caused by MONITOR and MONITORX
> instructions.
>
> Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com>
> [ jroedel at suse.de: Adapt to #VC handling infrastructure ]
> Co-developed-by: Joerg Roedel
2020 May 20
2
[PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events
On Tue, Apr 28, 2020 at 05:17:09PM +0200, Joerg Roedel wrote:
> From: Tom Lendacky <thomas.lendacky at amd.com>
>
> Implement a handler for #VC exceptions caused by MONITOR and MONITORX
> instructions.
>
> Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com>
> [ jroedel at suse.de: Adapt to #VC handling infrastructure ]
> Co-developed-by: Joerg Roedel
2015 Aug 11
2
[PATCH v2 00/22] Enable gpu switching on the MacBook Pro
This is a follow-up to the v1 posted in April:
http://lists.freedesktop.org/archives/dri-devel/2015-April/081515.html
Patches 1 - 17 enable GPU switching on the pre-retina MacBook Pro.
These were tested successfully by multiple people and solve two
tickets in Bugzilla:
https://bugzilla.kernel.org/show_bug.cgi?id=88861
https://bugs.freedesktop.org/show_bug.cgi?id=61115
Patches 18 - 22 are a
2010 Mar 09
4
"monitor"-ed address and IPI reduction
What is the point of specifying "current" as the address to monitor? The
memory location of interest really is irq_stat[cpu].__softirq_pending,
and if that was used it would then also be possible to actually avoid
sending IPIs when monitor/mwait are in use, as is being done on Linux.
Jan
_______________________________________________
Xen-devel mailing list
2016 Jan 11
8
[PATCH v5 00/12] Enable GPU switching on pre-retina MacBook Pro
Enable GPU switching on the pre-retina MacBook Pro (2008 - 2013), v5.
The main obstacle on these machines is that the panel mode in VBIOS
is bogus. Fortunately gmux can switch DDC independently from the
display, thereby allowing the inactive GPU to probe the panel's EDID.
In short, vga_switcheroo and apple-gmux are amended with hooks to
switch DDC, DRM core is amended with a
2011 Mar 23
1
Re: [RFC PATCH V4 3/5] cpuidle: default idle driver for x86
On 03/23/2011 08:43 AM, Len Brown wrote:
> Why is this patch a step forward?
Hi Len,
I have basically moved the code for arch default and mwait
idle from arch/x86/kernel/process.c to a driver. This was
suggested by Venki (https://lkml.org/lkml/2010/10/19/460)
as part of pm_idle cleanup and direct call of
cpuidle_idle_call(). There is not much new code here.
>
>> +obj-$(CONFIG_X86)
2016 Feb 01
0
[PATCH v5 00/12] Enable GPU switching on pre-retina MacBook Pro
Hi,
On Mon, Jan 11, 2016 at 08:09:20PM +0100, Lukas Wunner wrote:
> Enable GPU switching on the pre-retina MacBook Pro (2008 - 2013), v5.
This series hasn't seen any reviews or acks unfortunately.
Any takers?
Merging this would allow fdo #61115 to be closed
(currently assigned to intel-gfx).
FWIW this series has in the meantime been tested by more folks:
Tested-by: Pierre Moreau
2012 Apr 24
3
xen acpi cpufreq driver
Hi,
i''m not sure if i understood the new acpi xen cpufreq driver - here''s the
output when loading xen_acpi_processor module in linux 3.4:
dom0 dmesg:
[ 32.728151] xen-acpi-processor: (CX): Hypervisor error (-22) for ACPI CPU8
[ 32.728156] xen-acpi-processor: (CX): Hypervisor error (-22) for ACPI CPU9
[ 32.728160] xen-acpi-processor: (CX): Hypervisor error (-22) for
2011 May 18
1
Re: [PATCH] x86: clear CPUID output of leaf 0xd for Dom0 when xs
Hi Jan,
I was wondering if we should not let the code fall through and clear all registers to zero but rather clear just the one bit we care about? My concern is that a future Intel revision may expand this function and return other information besides that XSAVEOPT, which would then be wiped out by the fall-through code. I''m thinking something like this. Let me know if I have
2013 Feb 07
41
Patch series for IGD passthrough
This series contains all the fixes required to produce a working IGD
passthrough box. All the changes are previously seen in the dev list but
not yet accepted. Some of them are out-dated and need some reshape.
Detailed description can be found later in each patch.
. [PATCH 1/3] qemu-xen-trad/pt_msi_disable: do not clear all MSI flags
. [PATCH 2/3] qemu-xen-trad: Correctly expose PCH ISA bridge
2012 Aug 06
1
Xen4.2-rc1 test result
Hi All,
We did a round testing for Xen 4.2 RC1 (CS#25692) with Linux 3.4.7 dom0.
We covered VT-d, SR-IOV, Power Management, TXT, IVB new features, HSW new features.
We covered many cases for HVM guests (both Redhat Linux and MS Windows guest).
We tested on Westmere-EP, SandyBridge-EP, IvyBridge desktop, and Haswell hardware platforms.
We found no new issues, and verified 1 fixed bug.
Fixed bug