similar to: [PATCH 1/1] keep iommu disabled until iommu_setup is called

The iommu is enabled by default when xen is booting and later disabled in iommu_setup() when no iommu is present. But under some circumstances iommu code can be called before iommu_setup() is processed. If there is no iommu available xen crashes. This can happen for example when panic(...) is called as introduced with the patch "x86-64: detect processors subject to AMD erratum #121 and

1: IOMMU: properly check whether interrupt remapping is enabled 2: AMD IOMMU: only disable when certain IVRS consistency checks fail 3: VT-d: deal with 5500/5520/X58 errata Patch 1 and 2 are version 2 of a previously submitted, then withdrawn patch following up after XSA-36. Patch 3 is version 3 of a patch previously sent by Malcolm and Andrew. Signed-off-by: Jan Beulich

Hi Tim, Could you please have a look at this bug? Thanks a lot. http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1774 Best Regards, Yongjie Ren (Jay) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Does Xen 3.0.0 actually support the IOMMU on x86_64? I''ve tried building with a couple of different configurations, and it always fails if I''ve enabled CONFIG_GART_IOMMU. The problems center around undefined references to functions such as dma_alloc_coherent, dma_free_coherent, iommu_setup, iommu_hole_init, force_iommu, iommu_aperture_allowed, and so on. In all cases, changing

When xl is called to create a domU and there is not enough memory available, then the autoballooning is called to extract memory from dom0. During the ballooning a loop in libxl_wait_for_free_memory() waits unless enough memory is available to create the domU. But because of a variable-underflow the loop can finish too soon and xl finally aborts with the message: xc: error: panic:

We''re building for one case (CONFIG_ACPI_PCI defined) only, yet still had the other case''s code in there. Additionally there was quite a bit of pseudo-duplication between disabled(!) DMI scan and ACPI boot code. acpi_pci_disabled had only a single reader, which is off by default (i.e. must be enable on the command line), so it seems pointless to keep it. Signed-off-by: Jan

Trying to build the virtualbox-4.2 branch from git://pipo.sk/pipo/libvirt.git under OSX 10.7, I get the following build error: ... CC timegm.lo CC vasnprintf.lo CCLD libgnu.la /usr/bin/ranlib: file: .libs/libgnu.a(fd-hook.o) has no symbols /usr/bin/ranlib: file: .libs/libgnu.a(threadlib.o) has no symbols ranlib: file: .libs/libgnu.a(fd-hook.o) has no symbols ranlib: file:

c/s 25336:edd7c7ad1ad2 introduced the concept of a bogus vector, for in irqs delivered through the i8259 PIC after IO-APICs had been set up. However, if supurious PIC vectors are received, many "No irq handler for vector" log messages can be seen on the console. This patch adds to the bogus vector logic to detect spurious PIC vectors and simply ignore them. _mask_and_ack_8259A_irq()

Remove unused and pointless bits from mpparse.c (and other files where they are related to it). Of what remains, move whatever possible into .init.*, and some data items into .data.read_mostly. Signed-off-by: Jan Beulich <jbeulich@novell.com> --- 2011-03-09.orig/xen/arch/x86/acpi/boot.c +++ 2011-03-09/xen/arch/x86/acpi/boot.c @@ -177,7 +177,8 @@ acpi_parse_x2apic(struct acpi_subtable_h

Introduce a new flag to disable iommu emulation on old iommu systems. This patch is taken from my v4 patch queue, which is till pending, to make old or non-iommu system to run cleanly without interfered by iommuv2 codes. This might be helpful to isolate iommuv2 code in debugging unstable regressions. The reset part of v4 will be re-based. Thanks, Wei Signed-off-by: Wei Wang

Hi Inspired by the changes by Prachi Gandhi to use the command map from the UPS in the bcmxcp driver, I think the map should be used, if available, to control all commands the driver adds using "dstate_addcmd". The following patch is an attempt at doing so. The patch is against the bcmxcp branch. Since my UPS also supports : #define PW_UPS_ON (unsigned char)0x89 /* UPS on

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

From 159251a04afcdcd8ca08e9f2bdfae279b2aa5471 Mon Sep 17 00:00:00 2001 From: Liu Jinsong <jinsong.liu@intel.com> Date: Thu, 31 Oct 2013 06:38:15 +0800 Subject: [PATCH 4/4] XSA-60 security hole: flush cache when vmentry back to UC guest This patch flush cache when vmentry back to UC guest, to prevent cache polluted by hypervisor access guest memory during UC mode. The elegant way to do this

These instructions are prefix selected flavors of bsf and bsr respectively, and hence the presences of the F3 prefix must be handled in the emulation code in order to avoid running into problems on newer CPUs. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1058,6 +1058,9 @@ static bool_t vcpu_has(

As advised by Daniel P. Berrange, the third parameter can be passed on all platforms rather than specifically Mac. Quoting a libvirt commit rationale after Daniel: commit 9fa3a8ab6fd82ad2f5a14b490696085061418718 Author: Doug Goldstein <cardoe@cardoe.com> Date: Wed Oct 30 11:22:58 2013 -0500 MacOS: Handle changes to xdrproc_t definition With Mac OS X 10.9, xdrproc_t is no

We are currently initializing GIC irq properties (ITARGETSR, IPRIORITYR, and GICD_ICFGR) only in gic_route_irq, that is not called for guest interrupts at all. Move the initialization into a separate function (gic_set_irq_properties) and call it from gic_route_irq_to_guest. Changes in v2: - rebased on 77d3a1db3196b1b5864469f8d3f41d496800c795. Signed-off-by: Stefano Stabellini

hvm_enable() copies the table contents rather than storing the pointer, so there''s no need to keep these tables post-boot. Also constify the return values of the per-vendor initialization functions, making clear that once the per-vendor initialization is complete, the vendor specific tables won''t get modified anymore. Finally, in hvm_enable(), use the returned pointer for all

This fixes a bug in changeset 22526:7a5ee3800417, where the wrong value is read when deciding whether to flush the VTd tables. The effect is minor: in situations where the p2m entry is changed but the mfn is the same, the VTd tables will be unnecessarily flushed. old_entry is left untouched in the second case, since having a present old_entry will cause the an unnecessary check to be taken at

From a06ea5f6960b7bfa473f5d56762ce3a06b0a2b07 Mon Sep 17 00:00:00 2001 From: Liu Jinsong <jinsong.liu@intel.com> Date: Mon, 25 Nov 2013 01:13:12 +0800 Subject: [PATCH 2/4 V2] X86: enable support for new ISA extensions Intel has released new version of Intel Architecture Instruction Set Extensions Programming Reference, adding new features like AVX-512, MPX, etc. Refer to

These are the diffs against the pristine versions of arch/x86_64/kernel/[aperture.c,pci-gart.c] to better show the changes necessary to adapt those files to Xen. They were included with the patch and should not be applied again. -Mark Langsdorf AMD, Inc. --- pristine-linux-2.6.12/arch/x86_64/kernel/aperture.c 2005-06-17 12:48:29.000000000 -0700 +++