Displaying 20 results from an estimated 200 matches similar to: "[PATCH 0/4] Add V4V to Xen (v6)"
2012 Aug 16
27
[PATCH v3 0/6] ARM hypercall ABI: 64 bit ready
Hi all,
this patch series makes the necessary changes to make sure that the
current ARM hypercall ABI can be used as-is on 64 bit ARM platforms:
- it defines xen_ulong_t as uint64_t on ARM;
- it introduces a new macro to handle guest pointers, called
XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to
have size 8 bytes on aarch64);
- it replaces all the occurrences of
2013 May 01
8
[PATCH 0/2] runstate_memory_area on ARM
Hi all,
this patch series introduces support for runstate_memory_area on ARM.
The first patch moves VCPUOP_register_runstate_memory_area to common
code, while the second one add VCPUOP_register_runstate_memory_area to
the whilelist of vcpu_op hypercalls supported on ARM and properly
updates the runstate_memory_area during vcpu context switch.
Stefano Stabellini (2):
xen: move
2012 Aug 10
18
[PATCH v2 0/5] ARM hypercall ABI: 64 bit ready
Hi all,
this patch series makes the necessary changes to make sure that the
current ARM hypercall ABI can be used as-is on 64 bit ARM platforms:
- it defines xen_ulong_t as uint64_t on ARM;
- it introduces a new macro to handle guest pointers, called
XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to
have size 8 bytes on aarch64);
- it replaces all the occurrences of
2011 Jun 08
5
[PATCH] ioemu: IGFX passthrough fix SNB GGC
The GGC field have moved from 0x52 to 0x50 on Sandy Bridge.
Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>
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2008 Jul 15
5
[PATCH] ioemu-remote: Fix pci pass-through
ioemu-remote: Enable pci pass-through by default.
--
Jean Guyader
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http://lists.xensource.com/xen-devel
2012 Jan 12
4
[PATCH] Intel GPU passthrough: Host bridge config space
Expose more host bridge config space value to make
the driver happy for all the different revisions
of the device.
Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>
---
hw/pt-graphics.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
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2012 May 10
2
[PATCH][RESEND] qemu-xen: Intel GPU passthrough, fix OpRegion mapping (v3)
The OpRegion shouldn''t be mapped 1:1 because the address in the host
can''t be used in the guest directly.
This patch traps read and write access to the opregion of the Intel
GPU config space (offset 0xfc).
To work correctly this patch needs a change in hvmloader.
HVMloader will allocate 2 pages for the OpRegion and write this address
on the config space of the Intel GPU. Qemu
2008 Mar 27
6
pci pass-through, NIC card
Hi,
I am trying to make the vt-d and pci pass-through work and I have some
problems. I just try to give a NIC to an HVM guest.
When I create the vm the hypervisor goes to an infinite loop,
it displays in loop the message enclosed (console_on_xm_create).
I use xen x86_64, debian etch dom0 with linux-2.6.18.8-xen 32.
The hvm guest is a debian etch 64.
Cheers,
--
Jean Guyader
2008 Jul 23
28
[PATCH] ioemu-remote: ACPI S3 state wake up
ioemu-remote: The device model needs to write in the ACPI tables when it
wakes up from S3 state.
Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>
--
Jean Guyader
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2008 Mar 18
6
[PATCH] permute with 2MB chunk
The memory permutation cause a slow down in case of a save/restore (bug
1143). It works better when the mixing is done with 2MB chunks.
Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>
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2008 Jun 17
8
VCPU cores & sockets
Before I get to entrenched in the ACPI code - I thought I''d ping the
community to make sure nobody else has investigated this already -
Can we present cores vs sockets for guest VCPUs?
Right now, the number of total processors can be specified, but can we
specify cores per socket?
I see this potentially being an hvmloader function, as part of its acpi
build code.
Could this be
2007 Jul 08
3
change the "coeffcients approach" on an anova
hi everybody
I have to do a lot of Anova with R and I would like to have another type of
coefficients coding.. I explain.
by default if I have 2 temperatures for an experience. 100°C or 130°C and I
want to see the temperature effect on the presure
I want to estimate the coefficient of each temperature.
I will obtain ,with the anova, juste one coefficients for example +3,56 (for
100°C), and the
2011 Nov 27
5
[PATCH] qemu-xen: Intel GPU passthrough, fix OpRegion mapping.
The OpRegion shouldn''t be mapped 1:1 because the address in the host
can''t be used in the guest directly.
This patch traps read and write access to the opregion of the Intel
GPU config space (offset 0xfc).
To work correctly this patch needs a change in hvmloader.
HVMloader will allocate 2 pages for the OpRegion and write this address
on the config space of the Intel GPU. Qemu
2013 Oct 18
1
No P.values in polr summary
Hi everyone,
If I compute a "Ordered Logistic or Probit Regression" with the polr
function from MASS package. the summary give me : coefficients, Standard
error and Tvalue.. but not directly the p.value.
I can compute "manualy" the Pvalue, but Is there a way to directly obtain
the pa.value, and I wonder why the p.valeu is not directly calculated, is
there a reason?
exemple
2011 Nov 22
3
[PATCH] qemu-xen: Don't redefine libpci (3.1.7) defines.
These values are already defined by the libpci heders in the version
3.1.7.
PCI_STATUS_66MHZ
PCI_STATUS_RESERVED2
PCI_STATUS_FAST_BACK
PCI_MSIX_TABSIZE
Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>
---
hw/pci.h | 6 ++++++
hw/pt-msi.h | 2 ++
2 files changed, 8 insertions(+), 0 deletions(-)
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2008 Jul 14
14
Workaround for the corrupted Intel X48 DMAR table
hi,
I am trying the Xen unstable on X48 chipset these days but it failed due to
an corrupted RMRR table in the ACPI. The following is the acpi dump of DMAR.
DMAR @ 0x7fef1000
0000: 44 4d 41 52 20 01 00 00 01 d1 49 4e 54 45 4c 20 DMAR .....INTEL
0010: 44 58 34 38 42 54 32 20 12 06 00 00 4d 53 46 54 DX48BT2 ....MSFT
0020: 13 00 00 01 23 00 00 00 00 00 00 00 00 00 00 00 ....#...........
2011 Dec 09
1
[xen-4.1-testing test] 10458: trouble: broken/fail/pass
flight 10458 xen-4.1-testing real [real]
http://www.chiark.greenend.org.uk/~xensrcts/logs/10458/
Failures and problems with tests :-(
Tests which did not succeed and are blocking:
test-amd64-i386-xl-credit2 3 host-install(3) broken
test-amd64-amd64-xl-sedf 3 host-install(3) broken
test-amd64-amd64-xl-winxpsp3 3 host-install(3) broken
2012 Jul 16
2
Tk grid problem
Hi everybody,
I have a problem with the grid function in tk.
I juste try to put 4 buttons like this:
-------------------
| | |
| | C |
| A |--------|
| | |
---------- D |
| | |
| B | |
-------------------
A is 2x2
C is 1x2
B is 1x2
D is 2x2
but the code bellow dont work :
require(tcltk)
tt <-
2009 Apr 12
30
good progress on pci vga passthrough in xen-3.4-rc1
Platform : Nehalem, official Intel x58 with Core i7 920 (dx58so)
Main (Console): Nvidia 9500 GT PCI Express
Secondary: Nvidia 8800 GTS PCI Express
Yes, I binned the ASUS P6T due to bad VT-d support in the BIOS.
With the latest BIOS from Intel, the dx58so has enable/disable for VT-d, ICH FLR and Interrupt Mapping! Helped a lot with getting this working ...
Dom0: 2.6.18-xen0 (built from
2010 Sep 17
27
Problem: Pattern with vertical colored lines on the dom0 screen
Hi list,
I have a problem with a new laptop (reproducable on other machines too) and the
xen hypervisor.
When the hypervisor gets booted with VESA mode 800x600 I see some messages and
then the screen contents is switched into a pattern of vertical colored lines
and never comes back.
In text mode all works well, but later the pattern appears when the X servers
starts.
I disabled VTd in the bios