similar to: [PATCH] x86/PCI: fix guest_io_read() when pci_cfg_ok() denies access

Gracias a los tres, Raúl, Marcelino y Carlos. Lo del "get" de Marcelino me da la respuesta a lo que yo exactamente preguntaba, y funciona, pero ahora tengo problemas con el for, por lo que probablemente recurra al eval parse de Raúl o Carlos, que ya tienen el for. Aún así, lo intento 1º con el get. Con subset(df, subset=get(GT[i])>0) el problema es que en el for hago un

Gracias Marcelino. Si, (i in 1:length(GT)), lo he utilizado mil veces, pero se me sigue olvidando de una vez a otra. Lo iba a mirar, pero me centré primero en que me hiciera bien el mapa. He probado el for y me da este error: Error in aes(x = lon, y = lat, color = get(GT[i]), size = 2) + scale_colour_gradient(low = ("white"), : non-numeric argument to binary operator

One could even debate whether reserved bit faults are always fatal (and should never be propagated to the guest)... Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: 2008-01-28/xen/arch/x86/traps.c =================================================================== --- 2008-01-28.orig/xen/arch/x86/traps.c 2008-01-28 11:31:44.000000000 +0100 +++ 2008-01-28/xen/arch/x86/traps.c

Source: xen Version: 4.1.3~rc1+hg-20120614.a9c0a89c08f2-5 Severity: important - x86: Make asmlinkage explicitly a no-op, and avoid usage in arch/x86 Build-fix, done different in Debian. - tools/ocaml: Fix 2 bit-twiddling bugs and an off-by-one Relevant for xcp. - x86_64: Fix off-by-one error setting up the Interrupt Stack Tables Hypervisor code running with wrong stack. Breaks error handling

Do so by simply re-using _show_registers(). Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/x86_64/traps.c +++ b/xen/arch/x86/x86_64/traps.c @@ -225,6 +225,7 @@ void double_fault(void); void do_double_fault(struct cpu_user_regs *regs) { unsigned int cpu; + unsigned long crs[8]; watchdog_disable(); @@ -235,22 +236,18 @@ void do_double_fault(struct

1: correct LDT checks 2: add address validity check to guest_map_l1e() 3: use {rd,wr}{fs,gs}base when available 4: check for canonical address before doing page walks Signed-off-by: Jan Beulich <jbeulich@suse.com>

This set of patches converts the way frames gets created from using PUSHes/POPs to using MOVes, thus allowing (in certain cases) to avoid saving/restoring part of the register set. While the place where the (small) win from this comes from varies between CPUs, the net effect is a 1 to 2% reduction on a combined interruption entry and exit when the full state save can be avoided. 1: use MOV

"Jan Beulich" <JBeulich at suse.com> writes: #Okay, this at least clarifies there is a (relatively big) RMRR. There is #a change to the handling of these among the ones that'll become #4.3.3 - mind giving #http://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=6c63041428cc348bcb2887afabd606bc4bd5523f #a try on top of your 4.3.2 (or trying the tip of the stable-4.3 branch)? #

This series consists of improvements to Xen''s ability to print traces of its own stack, and specifically for the stack overflow case to be able to use frame pointers in a debug build. I have dev tested the series in debug and non-debug cases, with and without memory guards, and I believe that all the stack traces look correct. However, I would greatly appreciate a second opinion on the

Fix the mistake for debug exception(#DB), overflow exception(#OF; generated by INTO) and int 3(#BP) instruction emulation. For INTn (CD ib), it should use type 4 (software interrupt). For INT3 (CC; NOT CD ib with ib=3) and INTO (CE; NOT CD ib with ib=4), it should use type 6 (software exception). For other exceptions (#DE, #DB, #BR, #UD, #NM, #TS, #NP, #SS, #GP, #PF, #MF, #AC, #MC, and #XM), it

The self_nmi() code cause''s an NMI to be triggered by sending an APIC message to the local processor. However, NMIs are blocked by the VMEXIT, until the next iret or VMENTER. Volume 3 Chapter 27 Section 1 of the Intel SDM states: An NMI causes subsequent NMIs to be blocked, but only after the VM exit completes. As a result, as soon as the VMENTER happens, an immediate VMEXIT happens

The first patch really isn''t as much of a follow-up than what triggered the security issues to be noticed in the first place. 1: x86: preserve FPU selectors for 32-bit guest code 2: x86: fix XCR0 handling 3: x86/xsave: adjust state management 4: x86/fxsave: bring in line with recent xsave adjustments The first two I would see as candidates for 4.3 (as well as subsequent backporting,

There''re basically two methods to enter a given C-state: legacy (hlt + I/O read), and native(using mwait). MWAIT is always preferred when both underlying CPU and OS support, which is a more efficient way to conduct C-state transition. Xen PM relies on Dom0 to parse ACPI Cx/Px information, which involves one step to notify BIOS about a set of capabilities supported by OSPM. One capability

Finally I got around to breaking up the similarly named monolithic patch that caused a regression shortly before the 4.2 release and got therefore reverted. This series consists of the broken up pieces that - according to my testing - don''t expose the reported lockup; the 7th will need debugging to understand what''s wrong there. 1: use RTC_* names instead of literal numbers 2:

During debugging of another problem I found that in x2APIC mode, the destination field of the low address value wasn''t passed back correctly. While this is benign in most cases (as the value isn''t being used anywhere), it can be confusing (and misguiding) when printing the value read or when comparing it to the one previously passed into the inverse function. Signed-off-by: Jan

1: IOMMU: properly check whether interrupt remapping is enabled 2: AMD IOMMU: only disable when certain IVRS consistency checks fail 3: VT-d: deal with 5500/5520/X58 errata Patch 1 and 2 are version 2 of a previously submitted, then withdrawn patch following up after XSA-36. Patch 3 is version 3 of a patch previously sent by Malcolm and Andrew. Signed-off-by: Jan Beulich

Otherwise 'modprobe -r' on a module having a dependency on bridge will implicitly unload bridge, bringing down all connectivity that was using bridges. Signed-off-by: Jan Beulich <jbeulich@novell.com> net/bridge/br_if.c | 9 +++++++++ 1 file changed, 9 insertions(+) --- linux-2.6.23-rc8/net/bridge/br_if.c 2007-09-26 09:23:54.000000000 +0200 +++

Hi Jan, I was wondering if we should not let the code fall through and clear all registers to zero but rather clear just the one bit we care about? My concern is that a future Intel revision may expand this function and return other information besides that XSAVEOPT, which would then be wiped out by the fall-through code. I''m thinking something like this. Let me know if I have

Commit 111e7b15cf10f6 ("x86/ioperm: Extend IOPL config to control ioperm() as well") reworked the iopl syscall to use I/O bitmaps. Unfortunately this broke Xen PV domains using that syscall as there is currently no I/O bitmap support in PV domains. Add I/O bitmap support via a new paravirt function update_io_bitmap which Xen PV domains can use to update their I/O bitmaps via a

Commit 111e7b15cf10f6 ("x86/ioperm: Extend IOPL config to control ioperm() as well") reworked the iopl syscall to use I/O bitmaps. Unfortunately this broke Xen PV domains using that syscall as there is currently no I/O bitmap support in PV domains. Add I/O bitmap support via a new paravirt function update_io_bitmap which Xen PV domains can use to update their I/O bitmaps via a