similar to: How does vmm get all mmio areas of pci devices?

Hi all, I'm trying to develop some applications that communicate with VMM about guest OSs. Libvirt has drivers for many VMMs like Qemu, Vbox, etc. I'm currently using Vbox and time to time I get the error that says "this function is not supported by the connection driver". So, for which VMM, libvirt has the most compatible driver, regarding your experiences? Kind regards Kadir

Hi, list, A VMM provides a VMCS for each VM. How does the VMM assign system resources for each VM? For example, in a multi-core environment, how can I enable the VMM to run, say, on a two-core intel''s processor while I am able to force a VM to execute only on a specific core upon initializing the Guest OS ? that is to say, how I can assure the VM to believe that there is only one physical

Hi all, Please can anybody explain how communication(direct or indirect) happens between xen and guest os(windows) in full virtualization mode. Both from VMM to guest and from guest to VMM. Thanks and regards, Aditya. __________________________________________________________ Yahoo! India Answers: Share what you know. Learn something new http://in.answers.yahoo.com/

Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: Zheng Bin <zhengbin13 at huawei.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 2 +-

Hi guys: I'd like to "scriptify" my virtual machine manager deployment. In particular id like to 1) Configure a 3 node cluster from an ISO 2) Assign static IPs at the vm level, and have those cascade into /etc/hosts 3) Add storage to each machine in the cluster . 4) Set the memory/CPU# for each machine. Is there a way i can automate this task using VMM, or maybe, using VMM in

Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: zhengbin <zhengbin13 at huawei.com> --- v1->v2: add missing one space after the closing curly bracket

Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: zhengbin <zhengbin13 at huawei.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 2 +- 2

On Sun, 2013-08-11 at 17:06 +1000, Benjamin Herrenschmidt wrote: > I think I found at least two cases where "12" was used where it should > have been PAGE_SHIFT (basically ttm_mem_reg->num_pages). This > is only the tip of the iceberg, so this isn't a formal patch submission, > but I would appreciate your thought as to whether the below is correct > (and thus

On Sun, 2013-08-11 at 11:02 +0200, Maarten Lankhorst wrote: > > diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c > > index 5c7433d..c314a5f 100644 > > --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c > > +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c > > @@ -190,8 +190,8 @@

If it failed in kzalloc, vma will be freed in nvkm_vmm_node_merge. The later use of vma will casue use after free. Reported-by: Zheng Wang <hackerzheng666 at gmail.com> Reported-by: Zhuorao Yang <alex000young at gmail.com> Fix it by returning to upper caller as soon as error occurs. Signed-off-by: Zheng Wang <zyytlz.wz at 163.com> ---

On Thu, 2013-08-29 at 16:49 +1000, Ben Skeggs wrote: > > Additionally the current code is broken in that the upper layer in > > vm/base.c doesn't increment "pte" by the right amount. > > > > Now, if those two assertions can be made always true: > > > > - Those two functions (map_sg and map_sg_table) never deal with the > > "big"

Turing introduced a new simplified page kind scheme, reducing the number of possible page kinds from 256 to 16. It also is the first NVIDIA GPU in which the highest possible page kind value is not reserved as an "invalid" page kind. To address this, the invalid page kind is made an explicit property of the MMU HAL, and a new table of page kinds is added to the tu102 MMU HAL. One

Hi all, While doing some static analysis I ran into the following piece of code at drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:957: 957#define node(root, dir) ((root)->head.dir == &vmm->list) ? NULL : \ 958 list_entry((root)->head.dir, struct nvkm_vma, head) 959 960void 961nvkm_vmm_unmap_region(struct nvkm_vmm *vmm, struct nvkm_vma *vma) 962{

On Wed, Apr 04, 2018 at 03:48:39PM +0300, Māris Nartišs wrote: > 2018-04-03 23:00 GMT+03:00, Adam Borowski <kilobyte at angband.pl>: > > In commit da5e45e619b3f101420c38b3006a9ae4f3ad19b0 > > > > yet it is still reproducible for me on 4.16-rc7 and 4.16.0, which already > > have your fix. I don't know about earlier versions -- my newer card went > > into

The trailing semicolon is an empty statement that does no operation. Removing it since it doesn't do anything. Signed-off-by: Luis de Bethencourt <luisbg at kernel.org> --- Hi, After fixing the same thing in drivers/staging/rtl8723bs/, Joe Perches suggested I fix it treewide [0]. Best regards Luis [0]

Hi, I just found this new WARNING in dmesg. Maybe you want to know. I haven't seen this before in 5.7. BR Ortwin [Thu Aug 27 15:40:48 2020] ------------[ cut here ]------------ [Thu Aug 27 15:40:48 2020] WARNING: CPU: 6 PID: 23542 at drivers/gpu/drm/nouveau/nvif/vmm.c:68 nvif_vmm_put+0x65/0x70 [Thu Aug 27 15:40:48 2020] CPU: 6 PID: 23542 Comm: kworker/6:2 Tainted: G T

Hello, I keep receiving errors such as the following: Error rebooting domain: Timed out during operation: cannot acquire state change lock (held by qemuProcessReconnect) Traceback (most recent call last): File "/usr/share/virt-manager/virtManager/asyncjob.py", line 90, in cb_wrapper callback(asyncjob, *args, **kwargs) File

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

Hi Ben, I've been working with an mmio-constrained pci hierarchy intended almost solely for nvme devices and switches. Binding nouveau to an NV50-based gpu results in a kernel panic as the device cannot be fully mapped. I've made modifications in nv50 and vmm to unbind the driver from this hierarchy, and modified gf100 assuming it will have the same issue. 1/4 also includes a fix where

[15561.391527] ------------[ cut here ]------------ [15561.391560] WARNING: CPU: 0 PID: 20957 at drivers/gpu/drm/nouveau/nvif/vmm.c:71 nvif_vmm_put+0x4a/0x50 [nouveau] [15561.391562] Modules linked in: nls_utf8(E) isofs(E) fuse(E) msr(E) xt_comment(E) br_netfilter(E) xt_physdev(E) nfnetlink_cthelper(E) nfnetlink(E) ebtable_filter(E) ebtables(E) af_packet(E) bridge(E) stp(E) llc(E) iscsi_ibft(E)