similar to: Optimisations

Displaying 20 results from an estimated 6000 matches similar to: "Optimisations"

2008 Aug 02
1
fir_mem16,iir_mem16 and filter_mem16 optimisations
-----Original Message----- From: Jean-Marc Valin <jean-marc.valin at usherbrooke.ca> To: ??????? ??????? <altersoft at mail.ru> Date: Sat, 02 Aug 2008 07:54:34 -0400 Subject: Re: [Speex-dev] fir_mem16,iir_mem16 and filter_mem16 optimisations > > ??????? ??????? a ?crit : > > I have some questions about that functions: fir_mem16, iir_mem16 and filter_mem16. > >
2020 Feb 15
5
[flang-dev] About OpenMP dialect in MLIR
Reply to Kiran Chandramohan: > You are welcome to participate, provide feedback and criticism to change the design as well as to contribute to the implementation. Thank you Kiran. > But the latest is what is there in the RFC in discourse. I have used this as reference for the response. > We did a study of a few constructs and clauses which was shared as mails to flang-dev and the
2000 Aug 29
5
Optimization and doubles vs. floats
I saw some mail go by a bit ago about doubles-vs-floats, but I seem to have lost it. I'm interested in rewriting the mdct code using Altivec on MacOS X. Altivec doesn't support doubles, though -- the only floating point vector type is single precision floats. Vorbis currently has doubles everywhere -- is this really necessary? Doubles are supposedly faster than floats in the PPC
2020 Feb 17
3
[flang-dev] About OpenMP dialect in MLIR
Please find the reply inline below On Sun, Feb 16, 2020 at 12:59 AM Mehdi AMINI <joker.eph at gmail.com> wrote: > > > On Sat, Feb 15, 2020 at 10:42 AM Vinay Madhusudan via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Reply to Kiran Chandramohan: >> >> > You are welcome to participate, provide feedback and criticism to >> change the
2020 Feb 13
6
About OpenMP dialect in MLIR
Hi, I have few questions / concerns regarding the design of OpenMP dialect in MLIR that is currently being implemented, mainly for the f18 compiler. Below, I summarize the current state of various efforts in clang / f18 / MLIR / LLVM regarding this. Feel free to add to the list in case I have missed something. 1. [May 2019] An OpenMPIRBuilder in LLVM was proposed for flang and clang frontends.
2006 Apr 20
3
The contrary of command %in%
Dear r-list, I've got a data base: > HData[1:10,] NumTree Site Species Date Age DBH H IdentTree 1 1 Queige Spruce 2002 184 49 33.5 Queige 1 2 2 Queige Fir 2002 NA 5 4.6 Queige 2 3 3 Queige Fir 2002 25 8 6.6 Queige 3 4 4 Queige Spruce 2002 198 47 32.5 Queige 4 5 5 Queige Fir 2002 200 59 35.3 Queige 5 6 6 Queige
2003 Jul 22
1
Making a group membership matrix
Hi Helpers: I have a factor object that has 314k entries of 39 land cover types. (This object can be coerced to characters neatly should that be easier to work with.) > length(foo) [1] 314482 > foo[1:10] [1] Montane Chaparral Barren Red Fir Red Fir [5] Red Fir Red Fir Red Fir Red Fir [9] Red Fir Red Fir 39 Levels:
2004 Aug 06
6
[PATCH] Make SSE Run Time option.
So we ran the code on a Windows XP based Atholon XP system and the xmm registers work just fine so it appears that Windows 2000 and below does not support them. We agree on not supporting the non-FP version, however the run time flags need to be settable with a non FP SSE mode so that exceptions are avoided. I thus propose a set of defines like this instead of the ones in our initial patch:
2013 Jan 31
2
[LLVMdev] Getting command line options to affect subtarget features
On Thu, 2013-01-31 at 11:23 -0600, Bill Schmidt wrote: > On Thu, 2013-01-31 at 10:17 -0600, Bill Schmidt wrote: > > > > On Thu, 2013-01-31 at 09:42 -0600, Hal Finkel wrote: > > > ----- Original Message ----- > > > > From: "Bill Schmidt" <wschmidt at linux.vnet.ibm.com> > > > > To: llvmdev at cs.uiuc.edu > > > > Sent:
2005 Jun 17
5
[LLVMdev] Re: Control flow graph
On Fri, 17 Jun 2005, Manvi Agarwal wrote: > Hi Chris, Hi. FYI, it's usually better to email the llvmdev list with generic llvm questions. > Is it possible to get control flow graph of the application with the llvm > infrastructure in terms of basic blocks? Yes, given a BasicBlock*, you can iterate over the pred/succ blocks in the CFG like this: #include
2013 Jan 31
2
[LLVMdev] Getting command line options to affect subtarget features
On Thu, 2013-01-31 at 09:42 -0600, Hal Finkel wrote: > ----- Original Message ----- > > From: "Bill Schmidt" <wschmidt at linux.vnet.ibm.com> > > To: llvmdev at cs.uiuc.edu > > Sent: Thursday, January 31, 2013 9:26:15 AM > > Subject: [LLVMdev] Getting command line options to affect subtarget features > > > > The problem I'm trying to
2005 Jun 22
0
[LLVMdev] LLVM Assembly code
Hi, I have generated llvm assembly file using following commands: llvm-ld main.o fir.o llvm-dis a.out.bc I get a.out.ll as the llvm assembly file. When i go through this assembly file I come across the following code fir.entry: ; preds = %loopexit.1.i call void %print( sbyte* getelementptr ([2 x sbyte]* %.str_3, int 0, int 0), float* getelementptr ([97 x float]* %y, int 0, int 0), int 97 )
2013 Jan 31
0
[LLVMdev] Getting command line options to affect subtarget features
On Thu, 2013-01-31 at 11:29 -0600, Bill Schmidt wrote: > On Thu, 2013-01-31 at 11:23 -0600, Bill Schmidt wrote: > > On Thu, 2013-01-31 at 10:17 -0600, Bill Schmidt wrote: > > > > > > On Thu, 2013-01-31 at 09:42 -0600, Hal Finkel wrote: > > > > ----- Original Message ----- > > > > > From: "Bill Schmidt" <wschmidt at
2013 Jan 31
0
[LLVMdev] Getting command line options to affect subtarget features
On Thu, 2013-01-31 at 10:17 -0600, Bill Schmidt wrote: > > On Thu, 2013-01-31 at 09:42 -0600, Hal Finkel wrote: > > ----- Original Message ----- > > > From: "Bill Schmidt" <wschmidt at linux.vnet.ibm.com> > > > To: llvmdev at cs.uiuc.edu > > > Sent: Thursday, January 31, 2013 9:26:15 AM > > > Subject: [LLVMdev] Getting command line
2005 Jan 29
4
A couple of points about flac 1.1.1 on ppc/linux/altivec
On Thu, 27 Jan 2005, John Steele Scott wrote: > That looks fine to me as well. However, the best solution is something which > Luca suggested a few months ago, which is to use the functions defined in > altivec.h. These are C functions which map directly to Altivec machine > instructions. I am willing to help out, but I don't find the current lpc_asm.s > very easy to follow, and
2013 Jan 31
2
[LLVMdev] Getting command line options to affect subtarget features
The problem I'm trying to solve: Invoking clang on PowerPC with -fno-altivec has no effect. >From what I've been able to piece together, PPC.td specifies various CPUs and the processor features available on each. So for example we have: def FeatureAltivec : SubtargetFeature<"altivec","HasAltivec", "true",
2006 Jul 18
1
Theora, liboil and Cell processors
Hello all, On more than one occasion I have advocated the use of liboil over incorporating mmx code into libtheora. The two main reasons are: 1) To keep optimisation code in one place and out of the library. Everywhere else in the Linux world there is a move to centralise in order to co-ordinate experts and reduce redundancy. This reason does not seem to find a lot of agreement in Theora as it
2014 Jul 03
4
[PATCH] two patches of doubtful usefulness
Erik de Castro Lopo wrote: >> There's the following code in stream_decoder.c: > > Like you, I don't see a lot of value in these. I think I'll decline > these. FLAC__lpc_restore_signal_asm_ia32_mmx compares 'order' argument with 4 and if it's greater then it jumps to FLAC__lpc_restore_signal_asm_ia32. I wonder why the same wasn't done for PPC/Altivec:
2010 Mar 18
1
[LLVMdev] Turning on/off sub-target features (e.g. Altivec on PowerPC)
Hello, I'm using Mono with experimental LLVM backend support on PowerPC. I noticed that although LLVM's IR contains SIMD instructions the assembly produced doesn't contain any Altivec instructions and my PowerPC970 machine of course has Altivec support. Isn't there some kind of autodetection? I searched in Target sources but only found out that Altivec is disabled by default. Can
2010 Mar 18
1
[LLVMdev] Turning sub-target features on/off (e.g. Altivec on PowerPC)
Hello, I'm using Mono with experimental LLVM backend support on PowerPC. I noticed that although LLVM's IR contains SIMD instructions the assembly produced doesn't contain any Altivec instructions and my PowerPC970 machine of course has Altivec support. Isn't there some kind of autodetection? I searched in Target sources but only found out that Altivec is disabled by default. Can