similar to: Vorbis decoding/multi-channel mixing

Hi All, Currently I am investigating how interesting OGG is for me. The most important requirements are: - Decoding on embedded hardware, ARM7 or ARM9. - Mixing multiple audio streams/files on embedded hardware First of all how difficult is it to decode OGG on an ARM7/9 processor? I read that OGG decoding needs floating point support? Secondly I would like to know how many MIPS are needed to

Hi Tom Thanks, just at the feasibility phase right now, so this sort of info is really useful. Memory/MHz values for the Tremor/Vorbis code seem to vary wildly - at least I could not find a consistent set of numbers after trawling through the discussion groups... Thanks John -----Original Message----- From: tom abcd [mailto:tom.abcd@gmail.com] Sent: 28 March 2006 16:34 To: Anderton, John

Hi all, I'm thinking of using Speex for an embedded project. I would only need the decode part. My question is what percentage of the CPU is used on an optimized (assembly will be done) SH4 or ARM7 or ARM9 speex decoder running at 100Mhz. Thanks, Bolt __________________________________ Do you Yahoo!? Jazz up your holiday email with celebrity designs. Learn more.

Hi, I have read the decoding side performance on ARM7 or ARM9. Your comment is very useful for us on evaluating the possible usage of Speex on our ARM system. How about the encoding performance? In your article, you mentioned "optimization". What is it? Is it included the 1.1.6 release source codes? thanks, Jay -------------- next part -------------- An HTML attachment was

Good day, I have looked around for this information, but I have not been able to gain a clear understanding: what is the status of the LLVM ARM backend? That is, do the following work: 1. Generating Thumb code: I saw a video online where they describe an issue with using the ARM Thumb back-end 2. Generating code for ARM9 (ARMv5?) or ARM7 (ARMv4): again, the same presentation

Are JIT DLLs supported? The idea is to use llvm to put performance sensitive code into a DLL that a Windows app can then use. This would build the performance sensitive code on the target machine making it possible to exploit CPU specific x86 vector instructions. The code that calls fn's in the DLL should, ideally, be unaware that a llvm JIT is being used. -- Øyvind Harboe

Evan, > I'm the code owner of LLVM codegen and targets. I'm also the one of main developers on the original ARM target. That means, I would make the decisions on major development on ARM target if there are decisions to be made. > > But my role is very different from what people are looking for in this thread. To properly qualify a target like ARM which are supported on many

Hi all I'm looking in to using speex for an ARM7 based speech decode development (note we need the decode only). My hope is that we should be able to run the decoder (in wideband mode) real time on the ARM7 (40MHz) without any problems (the difficulty would be in the encode - but we plan to run that offline on a PC - so we should be OK). Can anyone confirm that this is the case please? Also

On Sep 17, 2008, at 3:00 PM, Tyler Wilson wrote: > Good day, > > I have looked around for this information, but I have not been able > to gain a clear understanding: what is the status of the LLVM ARM > backend? That is, do the following work: > > 1. Generating Thumb code: I saw a video online where they > describe an issue with using the ARM Thumb back-end

On Fri, 20 Jun 2008, [ISO-8859-1] ?yvind Harboe wrote: >> The ZPU has two instructions that I'd also like to use. These instructions >> can push a value from deeper down on the stack and also pop a value >> from the stack and store them deeper down on the stack. > > Sounds like the Intel X87 floating point stack, which we support. GCC does as well. Supporting floating

Short update: It seems that the workers go into some state in which they do not have a correct Rails environment (or db connection). When they enter this state it goes wrong all the time :( Joost Hietbrink (YelloYello) wrote: > Hi all, > > We''re experiencing some problems with Backgroundrb. > > Why is "# master_reactor_instance.result_hash = {}" commented in

On Wed, Jun 18, 2008 at 6:32 AM, Joost Hietbrink <joost at joopp.com> wrote: > Hi Sam Roberts, > First of all. Thanks for the Vpim gem. We use it at www.yelloyello.com and > it works great. I''m glad to hear that. > We''ve only encountered the following error: > # NoMethodError (undefined method `to_str'' for []:Array): > # >

Hi all, Recently I have upgraded a Python application from Xapian 1.0.7 to 1.2.2 in order to use the PostingSource class. It is a long-running process, and I am seeing the number of open file descriptors to the Xapian database steadily increase. I suspect what I am seeing is some kind of resource leak. I have no idea if it is a problem in our code or in the Xapian Python bindings. How do I debug

I have a script that does a weekly backup on a local backup harddrive with the following command: # rsync -aRxW --delete / /mnt/backup Today I got errors because the target drive was full. It appeared nothing on the targed drive ever got deleted. When I used the following command to backup only my home dir, it worked as it should. # rsync -aRxW --delete /home/joost /mnt/backup Using rsync

We are using the Ogg file format in our game Awesomenauts. Now whenever I rebuild our compressed music files from our uncompressed sources (WAV to OGG), oggenc.exe produces different files. They sound the same, but there are differences in the file. I did a checksum on the hex, and it turns out there are small pieces of similar differences throughout the file. This is a serious problem for us:

I have a question regarding ARM support. It was mentioned in mails below that LLVM supports ARM v6 but a lot of ARM v6 instructions are actually missing from ARM ISA description files( e.g. Media Instructions). Is there any documentation mentioning the unsupported parts of v6 version Thanks --Kapil On Thu, Sep 18, 2008 at 2:14 PM, Evan Cheng <evan.cheng at apple.com> wrote: > > On

Can you give some examples of missing instructions? Evan On Oct 9, 2008, at 4:58 PM, kapil anand wrote: > I have a question regarding ARM support. It was mentioned in mails > below that LLVM supports ARM v6 but a lot of ARM v6 instructions are > actually missing from ARM ISA description files( e.g. Media > Instructions). Is there any documentation mentioning the unsupported

Hi all, Zylin has implemented the world smallest 32 bit CPU with a GCC backend. (I shall stand corrected if anyone claims & proves otherwise :-) Implementing a GCC backend for a zero operand/stack based architecture proved pretty tricky, but I'm quite pleased with the resulting code. I did make alterations to the architecture to make it fit GCC without sacrificing CPU size. I have been

Hi all, I'm planning to work through the book "Analyzing Linguistic Data" by R.H. Baayen, which is an introduction to R used for, well, what the title says. ;-) On the first page of the book, Baayen says that in order to work with the book, R needs to download and install a number of packages from CRAN. The problem is that one of these packages, "Design", has apparently

> On Jun 19, 2008, at 2:30 PM, ?yvind Harboe wrote: >> My llvm.org knowledge is ... shallow ... but I'm hoping that >> someone would find the time & pity to answer my questions: >> >> Q: Is a stack based / zero operand CPU and llvm a good match? (GCC >> wasn't) > > I'm not really sure, I'm not too familiar with these architectures. >