similar to: MMX patch to speed up Theora decoding

Displaying 20 results from an estimated 600 matches similar to: "MMX patch to speed up Theora decoding"

2002 Aug 03
7
theora MMX decoder
I try to merge VP3's mmx decoder into theora. http://kyoto.cool.ne.jp/vp3/developers/theora-alpha3-MMXd-src.zip You can see the change by searching the keyword "_UsingMMX_" in all lib folder's file. From VP3???YO vp3@go8.enjoy.ne.jp
2005 Apr 11
2
Theora, MMX and optimisation
Hi everyone, I just landed into the theora planet, as a game programmer, I searched for a free video fomat/codec and the theora choice became obvious. However I experienced rather bad performance (at least from a game programming point of view) After a couple a profiling, I discovered, as previous discused in a post found via Google, that the bottleneck is in the ogg library. An unsane part of the
2006 Mar 30
2
compiling theora-mmx on AMD64
Hi all, I'm a Theora noob and just taking a look at the theora-mmx package in hopes of making Thoggen run faster for DVD ripping. I've checked out the latest svn of the theora-mmx branch and trying to compile it on Ubuntu Dapper AMD64. I run autogen.sh, then make, and soon get the following errors: make[2]: Entering directory `/home/dlenski/theora-mmx/lib' if /bin/sh ../libtool
2007 Dec 25
2
VC2005 MMX patch.
Here is the patch with my changes. Most work went into the decoder. I just changed on the encoder if something was nessesary to build the library. You can find the patch here (quite big).. http://torus.untergrund.net/code/theora_mmx_vc2005.diff Please let me know if the encoder works without problems. I just did a very brief testing of it. The decoder has been tested against the test
2013 Mar 07
2
[LLVMdev] ARM assembler's syntax in clang
Hi Ashi, > ld: illegal text-relocation to _data_table in table.o from foo in > use_table.o for architecture armv7 It looks like you're using iOS. I'm not familiar with the exact workings of that platform, but I think a similar message would occur in ELF-land. If iOS *is* comparable, your issue is that symbols in dynamically loaded objects can't (usually) be referenced directly
2003 Mar 05
5
VP3 IDCT
Hi, Is there anything special I need to know about VP3's IDCT? I mean besides the fact that there are separate IDCTs to handle sparse coefficient matrices. Are the IDCT functions mathematically equivalent to any textbook IDCT functions? Thanks... -- -Mike Melanson --- >8 ---- List archives: http://www.xiph.org/archives/ Ogg project homepage: http://www.xiph.org/ogg/ To
2013 Mar 08
0
[LLVMdev] ARM assembler's syntax in clang
> And be warned that the PC doesn't point at the next instruction when you use it like this - I believe you don't need to modify it at all if you swap the pop and the .long. Bernie, is it related to ARM pipeline? I'm interesting in this, is there any other additional information? On Fri, Mar 8, 2013 at 4:59 AM, Tim Northover <t.p.northover at gmail.com>wrote: > Hi Ashi,
2014 Sep 25
2
[LLVMdev] MachineRegisterInfo use_iterator/reg_iterator?
Thanks Quentin. I'm trying to examine from the operands of the return instruction, and then to get the last assignment of those. I thought use_iterator/reg_iterator may suit better than just loop through the machine basicblock in the reverse order. Cheng-Chih On Thu, Sep 25, 2014 at 1:51 PM, Quentin Colombet <qcolombet at apple.com> wrote: > Hi Cheng-Chih, > > On Sep 25,
2014 Sep 30
2
[LLVMdev] Custom pass that runs before EmitStartOfAsmFile()?
Hi all, I'm trying to write a custom module-level pass that runs before AsmPrinter::EmitStartOfAsmFile(), since I'd like to have some processed information available once entering this function. Looking through "Writing an LLVM pass" documentation, it's not clear to me if this is possible. I've also tried putting the pass in different orders (addPreISel, addIRPasses,
2014 Sep 25
2
[LLVMdev] MachineRegisterInfo use_iterator/reg_iterator?
Hi folks, I would like to find out the machine instructions that use some given registers in the reverse order, and I came across these iterators (use_iterator/reg_iterator). However, there are two things I noticed: 1) These iterators seem to traverse the machine function a bit differently from what I get from the machine function dump. In other words, the use_iterator list is not constructed in
2014 Aug 15
2
[LLVMdev] Default/initial values for function arguments?
Hi guys, I’m trying to figure out a way to assign initial values to function arguments. For a function in IR: define i32 @main (i32 %0, i32 %1) { %tmp = add i32 %0, %1 ... } I would like to make sure %0 has some initial value (e.g. i32 0) under some circumstances. Is there any easy way to do this? I understand that %0 comes from a live-in value which is defined from outside of the function. I
2006 Jul 02
5
What goes to Hardware ?
Hi people, As I said before: I did the IDCT to run on the FPGA. My friends from university did the Reconstruction routines running on the FPGA. I'm helping with the LoopFilter, and it is almost there. (all VHDL) I did a small profiling of the libTheora running on a Altera Stratix II device: The processor used was the NIOS II with 8Kb of data and instruction cache, branch prediction and
2010 May 18
2
idct8x8 C version in libtheora1.1 release
When using the IDCT routines, the C version [ lib/idct.c: oc_idct8x8_c(ogg_int16_t _y[64],int _last_zzi)] in libtheora 1.1.1, the decoded image is garbled. Is it functionally equivalent to the MMX optimized version [lib/x86/mmxidct.c: oc_idct8x8_mmx(ogg_int16_t _y[64],int _last_zzi)] ? I used some of the Theora video files from here: http://wiki.xiph.org/index.php/List_of_Theora_videos for
2008 Mar 07
1
Bug in reference idct.
Hi The Theora specification states, in section 7.9.3 ("The 1D Inverse DCT") steps 14-16: 14. Assign T[5] the value T[4] - T[5]. 15. Truncate T[5] to a 16-bit representation by dropping any higher-order bits. 16. Assign T[5] the value C4 * (-T[5]) >> 16. However, the relevant section of code in the reference decoder (lib/dec/idct.c line 50) is:
2015 Mar 18
2
[LLVMdev] missing register spills?
Hi folks, I'm running into this weird issue where the register spills appear to be missing for an "if" block for some reason. For example, the original if/else blocks: --- if reg0 // storeRegToStackSlot for reg1 // do something - missing a load for reg1? else // storeRegToStackSlot for reg1 // do something // loadRegFromStackSlot for reg1 end ---- I tried looking in the LLVM
2005 Feb 11
1
Changing the IDCT spec
So, in preparation for some decoder optimization work planned by Rudolf Marek, the subject of the size of the registers needed in the IDCT came up. The current spec language ensures that the result is exactly compatible with the C code for VP3. This language requires that some of the arguments to the multiplies be 17 or 18 bits, because they need to hold the sum or difference of two 16-bit
2005 Feb 19
2
flac-1.1.2 configure and Makefile fixes
I spent a bit of time trying to make the configure behave. that's the result, I didn't check if the asm output runs correctly (looks forcefully disabled) but at least builds as should. lu -- Luca Barbato Gentoo/linux Developer Gentoo/PPC Operational Manager http://dev.gentoo.org/~lu_zero -------------- next part -------------- A non-text attachment was scrubbed... Name:
2011 Jun 15
19
[XCP] XCP network and VLAN by Open vSwitch
Hello Everyone, I am new with XCP. I''ve setup several hosts with* XCP 1.0* and manage it through XenCenter and command console. Each host has two NICs, one (xenbr0) connected to a physical switch for Internet (said sw1), the other (xenbr3) connected to a physical switch for internal network (said sw2). I am trying to setup VMs and VLANs on xenbr3. I created a virtual bridge by
2005 Jul 20
1
MMX IDCT for theora-exp
Hello, I'm attaching IDCT MMX patch. I reused IDCT from theora-a3-MMXd.zip. It should work on 64bit X86 platform too. Here is most used functions when playing video with jet aircrafts (gripen) Ogg logical stream 310b2968 is Theora 720x480 29.97 fps video Encoded frame content is 720x480 with 0x0 offset I can play this video with like 200-300 frame drops on Athlon XP 1700+ CPU load (with
2007 Feb 19
2
optimization for OLPC
Hi, I heard that Theora will be used on OLPC. Is anyone working on optimization for OLPC? Regards, Chih-Chung Chang