Displaying 20 results from an estimated 700 matches similar to: "Iterate by Factor - Newbie Question"
2007 Feb 20
0
Standardized residual variances in SEM
Hello,
I'm using the "sem" package to do a confirmatory factor analysis on data
collected with a questionnaire. In the model, there is a unique factor G
and 23 items. I would like to calculate the standardized residual
variance of the observed variables. "Sem" only gives the residual
variance with the "summary" function, or the standardized loadings with
the
2009 Nov 12
1
Transforming a dataframe into a response/predictor matrix
I currently have a data frame whose rows correspond to each student and whose columns are different variables for the student, as shown below:
Lastname Firstname CATALOG_NBR Email StudentID EMPLID Start
1 alastname afirstname 1213 *@uark.edu 10295236 # 12/2/2008
2 anotherlastname anotherfirstname 1213 **@uark.edu ## 10295236 9/3/2008
Xattempts Q1
2013 Oct 14
1
[LLVMdev] Vectorization of pointer PHI nodes
On 14 October 2013 19:31, Arnold Schwaighofer <aschwaighofer at apple.com>wrote:
> Renato, can you post the c code for the function and the assembly that gcc
> produces?
>
Attached.
Your initial example could be well handled by vectorization of strided
> loops (and the mentioning of VLD3(.8?)/VST3(.8?) lead me to assume that
> this is what happened). But the LLVM-IR you
2011 Apr 15
2
Function for deleting variables with >=50% missing obs from a data frame
Hello R users!
I have several data frames where some of the variables have many missing observations. For example, Q1 in one of my data frames has over 66% of its observations missing. I have tried imputation with mice but it does not work for all the data frames and I get the following message or a similar message to this:
iter imp variable
1 1 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11
2017 Mar 02
5
Configuration problem installing backport to jessie
I came across this problem moving from the standard jessie package to
the backport:
$ sudo dpkg --configure r-base-core
Setting up r-base-core (3.3.2-1~jessiecran.0) ...
Preserving user changes to /usr/share/bash-completion/completions/R (renamed from /etc/bash_completion.d/R)...
mv: cannot stat ?/usr/share/bash-completion/completions/R?: No such file or directory
dpkg:
2013 Oct 14
0
[LLVMdev] Vectorization of pointer PHI nodes
Renato, can you post the c code for the function and the assembly that gcc produces?
Your initial example could be well handled by vectorization of strided loops (and the mentioning of VLD3(.8?)/VST3(.8?) lead me to assume that this is what happened). But the LLVM-IR you sent has a store of 0 in there ;) and strides by 4.
Thanks,
Arnold
Vectorization of strided loops:
I am using float as the
2012 Sep 21
0
[LLVMdev] Question about LLVM NEON intrinsics
On 21 September 2012 09:28, Sebastien DELDON-GNB
<sebastien.deldon at st.com> wrote:
> declare <16 x float> @llvm.arm.neon.vmaxs.v16f32(<16 x float>, <16 x float>) nounwind readnone
>
> llc fails with following message:
>
> SplitVectorResult #0: 0x2258350: v16f32 = llvm.arm.neon.vmaxs 0x2258250, 0x2258050, 0x2258150 [ORD=3] [ID=0]
>
> LLVM ERROR: Do not
2013 Feb 21
3
Having trouble converting a dataframe of character vectors to factors
R Experts,
I have a dataframe made up of character vectors--these are results from survey questions. I need to convert them to factors.
I tried the following which did not work:
scs2<-sapply(scs2,as.factor)
also this didn't work:
scs2<-sapply(scs2,function(x) as.factor(x))
After doing either of above I end up with
>str(scs2)
chr [1:10, 1:10] "very important" "very
2013 Oct 14
4
[LLVMdev] Vectorization of pointer PHI nodes
This is almost ideal for SLP vectorization, except for two problems:
1. We have 4 stores to consecutive locations, but the last element is the constant zero, and not an additional SUB. At the moment we don’t have support for idempotence operations, but this is something that we should add.
2. The values that we are subtracting come from 3 loads. We usually load 4 elements from memory, or
2012 Sep 21
2
[LLVMdev] RE : Question about LLVM NEON intrinsics
Hello Renato,
You're pointing me at ARM intrinsics related to loads, problem that I've reported in original e-mail, is not support for vector loads, but support for 'vmaxs'. For instance, there is no vector loads of 16 floats in ARM ISA but it is legal to write in LLVM:
; ModuleID = 'vadd.ll'
target datalayout =
2009 Feb 05
1
change individual label colours in a cluster plot?
I am doing some bibliometric analysis of interdisciplinarity using
cluster analysis of co-authorship.
I'd like to be able to specify the colour of individual authors in the
labels to show a prior grouping by discipline (red for sociology
authors, blue for economics authors, ..., that sort of thing).
Is there any way of doing this sort of thing? I'm hoping for something like:
h <-
2004 Sep 10
3
Latest Flac license thinking?
A while back Josh was thinking of changing the Flac license, and posted a
question on Slashdot regarding various licensing schemes.
Josh, have you come to any conclusions about future licensing of Flac?
- Woody
_________________________________________________________________
MSN Photos is the easiest way to share and print your photos:
http://photos.msn.com/support/worldwide.aspx
2016 Aug 23
0
[PATCH 8/8] Optimize silk_NSQ_del_dec() for ARM NEON
Created corresponding unit test, and the optimization is bit exact with C
function.
This optimization speeds up SILK encoder on NEON as following.
Fixed-point:
Complexity 0-5: 0%
Complexity 6-7: 6%
Complexity 8-9: 10%
Complexity 10: 8%
Got similar results on floating-point.
---
silk/NSQ_del_dec.c | 6 +-
silk/SigProc_FIX.h | 4
2016 Aug 23
2
[PATCH 7/8] Update NSQ_LPC_BUF_LENGTH macro.
NSQ_LPC_BUF_LENGTH is independent of DECISION_DELAY.
---
silk/define.h | 4 ----
1 file changed, 4 deletions(-)
diff --git a/silk/define.h b/silk/define.h
index 781cfdc..1286048 100644
--- a/silk/define.h
+++ b/silk/define.h
@@ -173,11 +173,7 @@ extern "C"
#define MAX_MATRIX_SIZE MAX_LPC_ORDER /* Max of LPC Order and LTP order */
-#if( MAX_LPC_ORDER >
2012 Sep 21
5
[LLVMdev] Question about LLVM NEON intrinsics
Hi all,
I would like to know if LLVM Neon intrinsics are designed to support only 'Legal' types for NEON units.
Using llc -march=arm -mcpu=cortex-a9 vmax4.ll -o vmax4.s on following ll code:
; ModuleID = 'vmax.ll'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple =
2004 Sep 10
1
Latest Flac license thinking?
I've always wondered, why can't a simple LGPL/GPL double-license do the
trick?
-- Asheesh.
On Tue, 15 Jan 2002, Matt Zimmerman wrote:
> On Tue, Jan 15, 2002 at 03:27:42PM -0500, Woodrow Stool wrote:
>
> > A while back Josh was thinking of changing the Flac license, and posted a
> > question on Slashdot regarding various licensing schemes.
> >
> > Josh, have
2008 Jul 03
1
Migrating from S-Plus to R - Exporting Tables
Does something like this get you close:
x <- list()
keys <- LETTERS[1:6]
# create
for (i in keys){
x[[i]] <- data.frame(a=1:5, b=1:5, c=1:5)
}
# output
output <- file('tempxx.txt', 'w')
for (i in keys){
write.table(i, row.names=FALSE, col.names=FALSE, file=output, quote=FALSE)
write.table(x[[i]], file=output, quote=FALSE)
}
close(output)
On Wed, Jul 2,
2012 Nov 12
3
select different variables from a list of data frames
Hi:
How do I select different variables from a list of data frames.
I have a list of 13 that looks like below. Each data frame has more variables than I need. How do I go through the list and select the variables that I need.
In the example below, I need to get the variables "a", and "q10" and "q14" to be returned to two separate data frames.
Thank you.
Yours, Simon
2011 Sep 01
0
[PATCH 5/5] resample: Add NEON optimized inner_product_single for floating point
From: Jyri Sarha <jsarha at ti.com>
Also adds inline asm implementations of WORD2INT(x) macro for fixed
and floating point.
---
libspeex/resample_neon.h | 101 ++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 101 insertions(+), 0 deletions(-)
diff --git a/libspeex/resample_neon.h b/libspeex/resample_neon.h
index ba93e41..e7e981e 100644
--- a/libspeex/resample_neon.h
+++
2012 Dec 20
1
[LLVMdev] vmlx forwarding an cortex A9 question
Hi all,
On following code when I use llc targeting ARM Cortex-A9 as follows, if vmlx-forwarding is turned off then 'vmla' instructions are generated. It seems that -mcpu=cortex-a9 enables it by default and thus less 'vmla' instructions are generated. On this specific example it doesn't make any difference in term of performance, but on a more complex example disabling