similar to: Dovecot sends BYE while fetching X-GM-MSGID

Hi, We've noticed that recently some of our bots (mostly clang-cmake-armv7-a15 and clang-cmake-thumbv7-a15) started timing out whenever someone commits a change to TableGen: r303418: http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15/builds/7268 r303346: http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15/builds/7242 r303341:

Test case name : >> llvm/projects/test-suite/SingleSource/Benchmarks/Misc/matmul_f64_4x4.c - >> This is a 4x4 matrix multiplication, we can make small changes to make it a >> 3x3 matrix multiplication for making things simple to understand . >> > > This is one very specific case. How does that behave on all other cases? > Normally, every big improvement comes with

> On 19 May 2017, at 14:54, Daniel Sanders via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > r303259 will have increased compile-time since it tripled the number of importable > SelectionDAG rules but a quick measurement building the affected file: > ninja lib/Target/<Target>/CMakeFiles/LLVM<Target>CodeGen.dir/<Target>InstructionSelector.cpp.o > for

On 19 December 2013 11:16, suyog sarda <sardask01 at gmail.com> wrote: > Test case name : > llvm/projects/test-suite/SingleSource/Benchmarks/Misc/matmul_f64_4x4.c - > This is a 4x4 matrix multiplication, we can make small changes to make it a > 3x3 matrix multiplication for making things simple to understand . > This is one very specific case. How does that behave on all

Good morning, I am facing a problem very easy to solve with a program, but not too easy (at least IMHO) with a "declarative" approach. I have a dataframe df with some information about bank branches with a validity time associated (start date/end date, format YYYY-MM-DD) to some attributes (for example number of employees assigned). The following example will clarify this

Hi, Anyone knows what's going on with SVN? http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15 http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15 http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15-full-sh etc. svn: E175012: Connection

It must be r303341, I commented on corresponding llvm-commits thread. On Fri, May 19, 2017 at 7:34 AM, Diana Picus via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Ok, thanks. I'll try to do a bisect next week to see if I can find it. > > Cheers, > Diana > > On 19 May 2017 at 16:29, Daniel Sanders <daniel_l_sanders at apple.com> > wrote: > > >

Hello everyone, Below are some buildbot numbers for the week of 7/10/2016 - 7/16/2016. Please see the same data in attached csv files: The longest time each builder was red during the week; "Status change ratio" by active builder (percent of builds that changed the builder status from greed to red or from red to green); Count of commits by project; Number of completed builds, failed

Hello everyone, Below are some buildbot numbers for the last week of 9/25/2016 - 10/1/2016. Please see the same data in attached csv files: The longest time each builder was red during the last week; "Status change ratio" by active builder (percent of builds that changed the builder status from greed to red or from red to green); Count of commits by project; Number of completed

Hello everyone, Below are some buildbot numbers for the last week of 6/05/2016 - 6/11/2016. Thanks Galina buildername | was_red -----------------------------------------------------------+----------- sanitizer-x86_64-linux-bootstrap | 134:12:25 perf-x86_64-penryn-O3-polly-parallel-fast | 46:29:26

Hi all, a few weeks ago I (and a few others) started hacking on a proof-of-concept hypervisor port to Cortex-A15 which uses and requires ARMv7 virtualization extensions. The intention of this work was to find out how to best support ARM v7+ on Xen. See http://old-list-archives.xen.org/archives/html/xen-arm/2011-09/msg00013.html for more details. I am pleased to announce that significant progress

Hi all, a few weeks ago I (and a few others) started hacking on a proof-of-concept hypervisor port to Cortex-A15 which uses and requires ARMv7 virtualization extensions. The intention of this work was to find out how to best support ARM v7+ on Xen. See http://old-list-archives.xen.org/archives/html/xen-arm/2011-09/msg00013.html for more details. I am pleased to announce that significant progress

Hi all, a few weeks ago I (and a few others) started hacking on a proof-of-concept hypervisor port to Cortex-A15 which uses and requires ARMv7 virtualization extensions. The intention of this work was to find out how to best support ARM v7+ on Xen. See http://old-list-archives.xen.org/archives/html/xen-arm/2011-09/msg00013.html for more details. I am pleased to announce that significant progress

Great! I expect I'll be able to cut it down further once I start fusing these smaller state-machines together. Before that, I'll re-order the patches that went into that diff so that I don't have to re-commit the regression before fixing it. > On 31 May 2017, at 13:48, Diana Picus <diana.picus at linaro.org> wrote: > > Hi, > > This runs in: > real

Hi Daniel, I did your experiment on a TK1 machine (same as the bots) and for r303258 I get: real 18m28.882s user 35m37.091s sys 0m44.726s and for r303259: real 50m52.048s user 88m25.473s sys 0m46.548s If I can help investigate, please let me know, otherwise we can just try your fixes and see how they affect compilation time. Thanks, Diana On 22 May 2017 at 10:49, Daniel

Nope, no sanitizers. On 22 May 2017 at 11:38, Daniel Sanders <daniel_l_sanders at apple.com> wrote: > Is that with -fsanitize=memory too? > > I'm currently building ToT with r303258 reverted. Once that's done I'll commit the revert and start investigating fixes. > >> On 22 May 2017, at 10:22, Diana Picus <diana.picus at linaro.org> wrote: >>

Hi I have the following ARM Linux program. The program detects if the processor has division instruction, if it does, it uses it, otherwise it uses slower library call. The program works with gcc, but it doesn't work with clang. clang reports error on the sdiv instruction in the assembler. The problem is this - you either compile this program with -mcpu=cortex-a9, then clang reports

On Thu, Dec 19, 2013 at 4:36 PM, Renato Golin <renato.golin at linaro.org>wrote: > On 19 December 2013 08:50, suyog sarda <sardask01 at gmail.com> wrote: > >> It may seem that total number of cycles are more or less same for single >> vmla and vmul+vadd. However, when vmul+vadd combination is used instead of >> vmla, then intermediate results will be generated

On Tue, May 23, 2017 at 10:51 AM Daniel Sanders via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Could you give https://reviews.llvm.org/differential/diff/99949/ a try? > It brings back the reverted commit and fixes two significant compile-time > issues. Assuming it works for you too, I'll finish off the patches and post > them individually. > > The first one

Thanks for trying that patch. I agree that 34 mins still isn't good enough but we're heading in the right direction. Changing the partitioning predicate to the instruction opcode rather than the number of operands in the top-level instruction will hopefully cut it down further. I also have a patch that shaves a small amount off of the compile-time by replacing the various