Displaying 20 results from an estimated 3000 matches similar to: "Memory allocator on OS/X"
2004 Feb 20
0
New Package: multinomRob
We would like to announce the availability on CRAN of a new package
multinomRob. It does robust estimation of overdispersed multinomial
regression models. The package is also able to estimate overdispersed
grouped multinomial logistic and multivariate-t logistic models. The
code is relatively general; for example, it allows for equality
constraints across parameters and it can handle datasets in
2004 Feb 20
0
New Package: multinomRob
We would like to announce the availability on CRAN of a new package
multinomRob. It does robust estimation of overdispersed multinomial
regression models. The package is also able to estimate overdispersed
grouped multinomial logistic and multivariate-t logistic models. The
code is relatively general; for example, it allows for equality
constraints across parameters and it can handle datasets in
2011 Feb 03
1
rgenoud for multiple chips: does a more recent special version of "snow" exist?
Dear everyone,
I am trying to run rgenoud on several chips simultaneusly. I used the
instructions provided on Jasjeet Sekhon's Homepage
(http://sekhon.berkeley.edu/rgenoud/multiple_cpus.html).
However, I have the newer version of R (R 2.12) installed - for a
64-bit machine. So, when I tried to install the special version of
"snow" from a zip file provided by Jasjeet on his page, R
2020 May 22
2
[PATCH] Optimized assembler version of md5_process() for x86-64
This patch introduces an optimized assembler version of md5_process(),
the inner loop of MD5 checksumming. It affects the performance of all
MD5 operations in rsync - including block matching and whole-file
checksums.
Performance gain is 5-10% depending on the specific CPU.
Originally created by Marc Bevand and placed in the public domain,
later integrated into OpenSSL. This is the original
2000 Mar 16
2
Differing Win & Linux user names
First off I'll admit that I'm a bit of a newbie to Samba and Linux so sorry if this is a dumb question, but I had a look and couldn't find the answer anywhere.
How do I map a username on a Windows 98 box to a different username on a Linux box? For example, if my username on a Windows machine was 'Daniel Foster' and my username on the linux box was 'dan' how do I make
2004 Feb 16
1
Newbie, Win2K config, fails on test 8 (long)
Hi. I'm not a sysadmin, but I'm the only person in this building who
knows anything about linux boxes. I'm trying to install samba to
connect the box (rh7.3) to the windows network. test 8 is where I run
into problems. My username and passwd are the same for both. My
firewall is down. I have appended my .conf file.
I've been searching around through the archives and
2005 Jun 17
2
drop elements of vector by class
i'm trying to build a little summary table for the contents of a data frame.
t<-sapply(macro, data.class)
c<-sapply(macro, length)
m<-sapply(macro, mean, na.rm=T, digits=2)
cbind(type=t, n=c , mean=m)
I want to drop the variables that are factors so I can include -max- and
-min- in my table.
-macro- contacts the data--how do I drop the variables according to their
data.class
2017 Dec 27
1
Convert MachineInstr to MCInst in AsmPrinter.cpp
Hello everyone,
In the file *lib/CodeGen/AsmPrinter/AsmPrinter.cpp*, I would like to obtain
an MCInst corresponding to its MachineInstr. Can anyone tell me a way to do
that?
If that is not possible, then, I would like to know if a given MachineInstr
is an *lea *instruction and I would like to know if the symbol involved
with this lea instruction is a jump-table.
For instance, given a
2013 Sep 30
0
[LLVMdev] [PROPOSAL] Improve uses of LEA on Atom
Was there any development on this? I noticed that clang still produces
a lea for the testcase in llvm.org/pr13320.
On 28 September 2012 11:36, Nowicki, Tyler <tyler.nowicki at intel.com> wrote:
> Hi,
>
>
>
> Here is an update on our proposal to improve the uses of LEA on Atom
> processors.
>
>
>
> 1. Disable current generation of LEAs
>
>
>
> Due to
2004 Sep 10
3
patch
So here is quick patch solving the problem, now it should be PIC.
--
Miroslav Lichvar
lichvarm@phoenix.inf.upol.cz
-------------- next part --------------
--- lpc_asm.nasm.orig Wed Jul 18 02:23:40 2001
+++ lpc_asm.nasm Sat Nov 17 21:09:46 2001
@@ -59,10 +59,10 @@
;
ALIGN 16
cident FLAC__lpc_compute_autocorrelation_asm_ia32
- ;[esp + 24] == autoc[]
- ;[esp + 20] == lag
- ;[esp + 16] ==
2005 Jul 11
2
postfix on centos-4
I am unable to install postfix on a centos-4 DomU.
Running xen-2.0.6.
-bash-3.00# rpm -ivh postfix-2.1.5-4.2.RHEL4.i386.rpm
Preparing...
(Hangs indefinitely until I hit Ctl-C)
########################################### [100%]
error: %pre(postfix-2.1.5-4.2.RHEL4.i386) scriptlet failed, exit status 0
error: install: %pre scriptlet failed (2), skipping
postfix-2.1.5-4.2.RHEL4
Same result
2009 Aug 30
3
experimental patch for libtheora1.1beta3
Good morning in the Lord
Regarding the port of libtheora1.1beta3 for OpenBSD for amd64 and the
problem I described at:
http://lists.xiph.org/pipermail/theora/2009-August/002640.html
Attached is a patch for
libtheora/patches/patch-lib_x86_mmxencfrag_c
I can play videos with it. ?Does it work for you?
Best regards
--
Dios, gracias por tu amor infinito.
2013 Oct 05
0
[LLVMdev] Codegen performance issue: LEA vs. INC.
On Oct 2, 2013, at 11:48 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> The two address pass is only concerned about register pressure. It sounds like it should be taught about profitability. In cases where profitability can only be determined with something machinetracemetric then it probably should live it to more sophisticated pass like regalloc.
>
> In this case, we
2011 Sep 21
1
[LLVMdev] Instruction Selection
I've got a question about instruction selection for a backend I'm writing.
The target has two register classes, RC1 and RC2. The instruction set is far from orthogonal.
The ADD instruction is two address with both register/immediate and register/memory forms. The register operand is in the RC1 class.
The LEA instruction is three address with the destination register in the RC2 class.
2012 Aug 10
0
[LLVMdev] RFC: Adding pass in X86PassConfig::addPreEmitPass for LEA optimization on Atom
Hi,
We are getting ready to implement several heuristics for correctly using LEAs to avoid stalls in the address generator on Atom. Our plan is to:
1. Disabling LEA generation on Atom in X86ISelDAGToDAG:: SelectLEAAddr() for all but a few pseudo-instructions
2. Identify loads and stores in a X86PassConfig::addPreEmitPass() pass and examine several preceding instructions to
2012 Sep 28
2
[LLVMdev] [PROPOSAL] Improve uses of LEA on Atom
Hi,
Here is an update on our proposal to improve the uses of LEA on Atom processors.
1. Disable current generation of LEAs
Due to a 3 cycle stall between the ALU and the AGU any address generation done using math instruction will cause a stall on loads and stores which are within 3 cycles of the address generation. Consequently, the heuristics for using LEAs efficiently must know how many
2005 Aug 09
2
Compiling legacy LSI megaraid drivers (Linux 2.6.11) with xen 2.0.7?
Hi all,
I''ve been using Xen for a while and I am trying to install it onto a
Dell Poweredge 2950. The 2850 uses a PERC4/Di raid on motherboard,
which requires the LSI Legacy SCSI Raid driver to be compiled into the
2.6.11-xen0 kernel. I''ve been recompiling the kernel by:
1. Go into the linux-2.6.11-xen0 directory. Select the driver using
"make ARCH=xen
2015 Feb 13
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
I submitted the problem report to clang's bugzilla but no one seems to
care so I have to send it to the mailing list.
clang 3.7 svn (trunk 229055 as the time I was to report this problem)
generates slower code than 3.5 (Apple LLVM version 6.0
(clang-600.0.56) (based on LLVM 3.5svn)) for the following code.
It is a "8 queens puzzle" solver written as an educational example. As
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
The regressions in the performance of generated code, introduced
by the llvm 3.6 release, don't seem to be limited to this 8 queens
puzzle" solver test case. See...
http://www.phoronix.com/scan.php?page=article&item=llvm-clang-3.5-3.6-rc1&num=1
where a bit hit in the performance of the Sparse Matrix Multiply test
of the SciMark v2.0 benchmark was observed as well as others.
2013 Sep 13
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Actually there is no miscompile there as esi isn't needed. The flags are
which the cmove is using.
342: shr esi,0x5
345: lea rbp,[rip+0x0] # 34c <llvm::sys::getHostCPUName()+0xbc>
34c: lea r12,[rip+0x0] # 353 <llvm::sys::getHostCPUName()+0xc3>
353: cmove rbp,r12 <- this is dependent on the flags from the shift.
I think your real problem is