similar to: nouveau driver is not loading

Hi All, I'm having this really weird issue with broken hotplug on a Dell Latitude E6430 with hybrid gfx, with a gf108 as discrete GPU. The LCD panel and VGA are connected through a mux to the iGPU, but the HDMI is only connected to the nvidia dGPU. Plugging in a HDMI monitor when the dGPU is suspend works fine, the ACPI event fires and everything works as it should. Unplugging the HDMI

MSIs were only problematic on some old, broken chipsets. But now that we already see systems where PCI legacy interrupts are somewhat flaky, it's really time to move to MSIs. Signed-off-by: Lucas Stach <dev at lynxeye.de> --- drivers/gpu/drm/nouveau/core/include/subdev/mc.h | 1 + drivers/gpu/drm/nouveau/core/subdev/mc/base.c | 17 +++++++++++++++++ 2 files changed, 18

Am Mittwoch, den 28.08.2013, 17:09 +1000 schrieb Ben Skeggs: > On Wed, Aug 28, 2013 at 10:00 AM, Lucas Stach <dev at lynxeye.de> wrote: > > MSIs were only problematic on some old, broken chipsets. But now that we > > already see systems where PCI legacy interrupts are somewhat flaky, it's > > really time to move to MSIs. > > > > Signed-off-by: Lucas Stach

On 13 April 2015 at 20:42, Alexandre Courbot <acourbot at nvidia.com> wrote: > Ben, I guess our main remaining concern with this patch is how it should > integrate wrt. the existing PMU code. Since it is designed to interact with > the NVIDIA firmware, maybe we should use a different base code, or do you > think we can somehow share code and data structures? Hey Alexandre, Sorry

- Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies by reporting Perf counters. 3.Be critical for GPU

Hi, When Ubuntu12.04 64bit domU boot up, Intel VGA-passthrough doesn''t work. I used the command "xm create" to boot up Dom-U. Windows7-64bit-SP1 works quite well with same configuration. Boot log is as follows. Dom-U dmesg: [ 1.421858] initcall rfcomm_init+0x0/0xf1 [rfcomm] returned 0 after 2192 usecs [ 1.423021] calling i915_init+0x0/0x8d [i915] @ 387 [ 1.423023]

On Wed, Aug 28, 2013 at 10:00 AM, Lucas Stach <dev at lynxeye.de> wrote: > MSIs were only problematic on some old, broken chipsets. But now that we > already see systems where PCI legacy interrupts are somewhat flaky, it's > really time to move to MSIs. > > Signed-off-by: Lucas Stach <dev at lynxeye.de> > --- > drivers/gpu/drm/nouveau/core/include/subdev/mc.h

GP10B's MC is compatible with GP100's, but engines need to be explicitly put out of ELPG during init. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/include/nvkm/subdev/mc.h | 1 + drm/nouveau/nvkm/subdev/mc/Kbuild | 1 + drm/nouveau/nvkm/subdev/mc/gp100.c | 17 ++++++++---- drm/nouveau/nvkm/subdev/mc/gp10b.c | 50

Hi Deepak, There's... a lot of stuff going on here. Can you describe the goal of this patch (which could then be used as the patch commit message)? The current one basically boils down to "Add support for loading PMU", but merely loading the fw into a fuc engine is just a handful lines of code. Also, except in rare cases, it's customary to split up patches of this size into

Hi Mirkin, Your observations are quiet correct. After the boot code is submitted successfully, I will submit the code to configure & enable features of PMU.(This will be done by sending cmds to PMU). Now talking about this patch: Apart from just the boot code, I have also included some things in this patch that I can remove for now(I will include these things in later digestible chunks): -

I noticed that bsp, vp and ppp had no interrupt handler after investigating why 15% of my cpu time went to interrupts. nouveau was silent about it, but it should be an error since we have no way of acking in that case. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- fwiw, the interrupt was 10, the exit interrupt after secret scrubber finishes.. I have

From: Deepak Goyal <dgoyal at nvidia.com> - Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies

On Fri, Aug 30, 2013 at 11:10 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > On Thu, Aug 29, 2013 at 1:07 AM, Ben Skeggs <skeggsb at gmail.com> wrote: >> On Thu, Aug 29, 2013 at 3:00 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >>> On Thu, Aug 29, 2013 at 12:45 AM, Ben Skeggs <skeggsb at gmail.com> wrote: >>>> On Thu, Aug 29, 2013 at

On Fri, Aug 30, 2013 at 12:01 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > On Thu, Aug 29, 2013 at 9:58 PM, Ben Skeggs <skeggsb at gmail.com> wrote: >> On Fri, Aug 30, 2013 at 11:10 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >>> On Thu, Aug 29, 2013 at 1:07 AM, Ben Skeggs <skeggsb at gmail.com> wrote: >>>> On Thu, Aug 29, 2013 at

On Fri, Aug 30, 2013 at 5:11 PM, Lucas Stach <dev at lynxeye.de> wrote: > Am Freitag, den 30.08.2013, 15:36 +1000 schrieb Ben Skeggs: >> On Fri, Aug 30, 2013 at 12:01 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >> > On Thu, Aug 29, 2013 at 9:58 PM, Ben Skeggs <skeggsb at gmail.com> wrote: >> >> On Fri, Aug 30, 2013 at 11:10 AM, Ilia Mirkin

On 09/03/2013 09:45 PM, Ben Skeggs wrote: > On Fri, Aug 30, 2013 at 5:11 PM, Lucas Stach <dev at lynxeye.de> wrote: >> Am Freitag, den 30.08.2013, 15:36 +1000 schrieb Ben Skeggs: >>> On Fri, Aug 30, 2013 at 12:01 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >>>> On Thu, Aug 29, 2013 at 9:58 PM, Ben Skeggs <skeggsb at gmail.com> wrote:

Several users have, over time, reported issues with MSI on these IGPs. They're old, rarely available, and MSI doesn't provide such huge advantages on them. Just disable. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87361 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74492 Fixes: fa8c9ac72fe ("drm/nv4c/mc: nv4x igp's have a different msi rearm register")

<adding nouveau-devel to the Cc> Hi Ben, On 02-03-16 04:23, Ben Skeggs wrote: > On 03/01/2016 09:37 PM, Hans de Goede wrote: <snip> >> Ok, I've but an mmiotrace of the blob starting with a monitor connected >> to the troubesome connector here: >> >> https://fedorapeople.org/~jwrdegoede/mmiotrace.log.xz >> >> And a demmio-ed version (with

On Thu, Aug 29, 2013 at 9:58 PM, Ben Skeggs <skeggsb at gmail.com> wrote: > On Fri, Aug 30, 2013 at 11:10 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >> On Thu, Aug 29, 2013 at 1:07 AM, Ben Skeggs <skeggsb at gmail.com> wrote: >>> On Thu, Aug 29, 2013 at 3:00 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: >>>> On Thu, Aug 29, 2013 at

It adds PMU boot support.It loads PMU firmware into PMU falcon.RM/Kernel driver receives INIT ack (through interrupt mechanism) from PMU when PMU boots with success. Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 26 +- drm/nouveau/nvkm/subdev/pmu/base.c | 108 ++ drm/nouveau/nvkm/subdev/pmu/gk20a.c | 2131