Displaying 20 results from an estimated 4000 matches similar to: "Standalone Server with Wins -- Password Not Required onWin/XP"
2008 Jan 12
3
Standalone Server with Wins -- Password Not Required on Win/XP
Hi There,
I created a standalone server on CentOS 5.1 with samba at 25b on an x86_64
system. The shares defined below are available to the windows xp clients on
the 10.43.10.x/24 subnet. Samba also provides win server support to this
subnet.
We are having problems we password protection associated with the shares.
The first access to the samba server requests a userid -- this likely allows
2008 Jan 16
0
FW: Standalone Server with Wins -- Password Not Required onWin/XP
I wish this was the case Chris. Win/XP presents a login box that requests
userid and password. Here are a couple of the cases I have tried:
(1) If I enter userid Only, I gain full access to the share without Ever
entering a password
(2) If I enter userid and samba password, the combination is rejected and
the share is not visible
This is not consistent with "the user authenticates with
2017 Dec 06
2
[LLD] Slow callstacks in gdb
Rui Ueyama <ruiu at google.com> writes:
> On Tue, Dec 5, 2017 at 1:22 PM, Rafael Avila de Espindola <
> rafael.espindola at gmail.com> wrote:
>
>> Martin Richtarsky <s at martinien.de> writes:
>>
>> > Output looks as follows [1] Seems sh_offset is missing?
>>
>> That is what readelf prints as Off
>>
>> > [17] .rela.text
2015 Apr 23
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
----------------------------------------
> Date: Tue, 21 Apr 2015 09:15:02 -0700
> Subject: Re: [LLVMdev] question about alignment of structures on the stack (arm 32)
> From: t.p.northover at gmail.com
> To: alexey.perevalov at hotmail.com
> CC: llvmdev at cs.uiuc.edu
>
>> I'm using MachO loader (https://github.com/LubosD/darling/). I'm trying to make it work on
2015 Apr 23
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
----------------------------------------
> Date: Thu, 23 Apr 2015 07:09:47 -0700
> Subject: Re: [LLVMdev] question about alignment of structures on the stack (arm 32)
> From: t.p.northover at gmail.com
> To: alexey.perevalov at hotmail.com
> CC: llvmdev at cs.uiuc.edu; lubos at dolezel.info
>
>>> By default almost all ELF platforms use an ABI called AAPCS (either
2015 Apr 20
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
Dear community,
I faced with code which was generated by llvm, assembly instructions of that code is relying on 8-bytes alignment for structures on the stack.
The part of Objective C code is following:
-(void)getCharacters:(unichar *)unicode {
NSRange range;
range.location = 0;
range.length = [self length];
printf("%p, %p\n", &range.location, &range.length);
And
2015 Apr 21
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
Hello Tim, thanks for response
----------------------------------------
> Date: Mon, 20 Apr 2015 11:45:03 -0700
> Subject: Re: [LLVMdev] question about alignment of structures on the stack (arm 32)
> From: t.p.northover at gmail.com
> To: alexey.perevalov at hotmail.com
> CC: llvmdev at cs.uiuc.edu
>
> On 20 April 2015 at 11:09, Alexey Perevalov
> <alexey.perevalov at
2007 Jul 27
1
get() with complex objects?
Hello R-listers,
I'm having trouble accessing "sub" objects ("attributes"?), e.g.,
"x$silinfo$avg.width" using the /get() /command; I'm using/ get()/ in a
loop as illustrated in the following code:
#FIRST MAKE CLUSTERS of VARYING k
/for (i in 1:300){
assign(paste("x.",i,sep=""),pam(x,i)) #WORKS FINE
}/
#NEXT, TAKE LOOK AT AVE.
2003 Feb 04
5
SORTING Arrays by index value
Hello, I'm somewhat new to R. I've searched the archive for the last year
and tried to consult the manual pages for the following problem, but did
not find an answer.
I want to sort an array by the index values. Here is the array
>acc.gp.bl.wtmn
Gp17 Gp4
1 0.5703125 0.6406250
10 0.7812500 0.7109375
11 0.8046875 0.7343750
12 0.8359375 0.7890625
13 0.8515625 0.7109375
2008 Feb 22
2
Looping and Pasting
Hello R-community: Much of the time I want to use loops to look at graphs,
etc. For example,
I have 25 plots, for which the names are m.1$medoids, m.2$medoids, ...,
m.25$medoids.
I want to index the object number (1:25) as below (just to show concept).
for (i in 1:25){
plot(m.i$medoids)
}
I've tried the following, with negative results
for ...
2015 Apr 24
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
----------------------------------------
> Date: Thu, 23 Apr 2015 09:33:58 -0700
> Subject: Re: [LLVMdev] question about alignment of structures on the stack (arm 32)
> From: t.p.northover at gmail.com
> To: alexey.perevalov at hotmail.com
> CC: llvmdev at cs.uiuc.edu; lubos at dolezel.info
>
>>> void func(int x, long long y)
>>>
>>> iOS will pass y in
2004 Sep 22
1
Sample without replacement
Hello, I have a simple problem (checked the archives and the appropriate
help pages, to no avail). I want to creat a vector that is length(2000).
The vector is to consist of two strings( "std" and "dev") with 1760 "std"s
and 240 "dev"s. Furthermore, for each element of the vector, i want the
selection of one of the strings to be approx. random. The
2005 Jan 07
2
Differences between Samba-related PAM modules
Several different PAM modules relating to Samba exist. The ones I could
find were as follows:
pam_smb
http://www.csn.ul.ie/~airlied/pam_smb/
Authenticates against an NT domain controller, without joining the domain.
(Doesn't work with Active Directory.)
pam_ntdom
http://www.cb1.com/~lkcl/pam-ntdom/
Based on the above, authenticates against an NT domain. Requires the client
to be added to
2006 Sep 06
2
[LLVMdev] best way to implement complex addressing modes
The ARM has some very powerful and complex addressing modes. For
example, the data processing instructions (and, orr, add, ..) have an
addressing mode that has 11 options (imm, reg, and 9 reg + some
shift).
I am considering 3 ways to implement this:
1) define one instruction that has an ARM specific addressing mode
that covers all 11 possibilities.
2) define 11 instructions.
3) a mix of the two
2000 Apr 05
2
My first R-program
Sorry, I pasted the wrong file in earlier... this is the correct one:
pValCalculator(b, n=20, m=20)
{
ind <- 1:min(c(n,m))
prob <- (1-pnorm(b,sd=std*sqrt(ind)))
prob1 <- sum((n-ind+1)*(m-ind+1)*prob)
prob1
}
inputData <-
scan("/users/lvssso/projects/LAMA/output/pValLamaScore.tmp", list(block1
= "",block2 = "",width1 = 0,width2 = 0,alignment = 0,score
2018 Dec 05
2
Strange regalloc behaviour: one more available register causes much worse allocation
Preamble
--------
While working on an IR-level optimisation completely unrelated to register
allocation I happened to trigger some really strange register allocator
behaviour causing a large regression in bzip2 in spec2006. I've been trying
to fix that regression before getting the optimisation patch committed, because
I don't want to regress spec2006, but I'm basically fumbling in
2011 Feb 18
2
[LLVMdev] Adding "S" suffixed ARM/Thumb2 instructions
Hello everyone,
I've added the "S" suffixed versions of ARM and Thumb2 instructions to
tablegen. Those are, for example, "movs" or "muls".
Of course, some instructions have already had their twins, such as add/adds,
and I leaved them untouched.
Besides, I propose the codegen optimization based on them, which removes the
redundant comparison in patterns like
orr
2013 Mar 27
1
Passing arguments between apply and l(s)apply functions vs. nested for loop
Hi R community,
I have a question concerning passing arguments between apply and lapply? Or maybe, once my problem is explained, the question is really about how to best transform my nested for loops into list/matrix operations; I am just beginning this transformation away from nested for loops, so I beg of you to have some lenience regarding my ignorance.
Part I:
I used a set of nested for
2006 Aug 22
0
[LLVMdev] selecting select_cc
Hi Rafael,
> I am trying to add support for select_cc. In ARM it can be implemented
> with:
>
> mov $dst, $falseVal
> cmp $a, $b
> moveq $dst, $trueVal
The more normal ARM code, as produced by assembly writers and compilers
that I've seen, is
cmp $a, $b
moveq $dst, $trueVal
movne $dst, $falseVal
e.g. at the end of a function returning r0
orr r0, r0, #0x40
2006 Sep 07
0
[LLVMdev] best way to implement complex addressing modes
On Wed, 6 Sep 2006, [UTF-8] Rafael Esp?ndola wrote:
> The ARM has some very powerful and complex addressing modes. For
> example, the data processing instructions (and, orr, add, ..) have an
> addressing mode that has 11 options (imm, reg, and 9 reg + some
> shift).
>
> I am considering 3 ways to implement this:
>
> 1) define one instruction that has an ARM specific