similar to: Profile and Win2k SP2 problem.

Hi there! After some long hours trying to figure out some nasty behavior related to win2k automatically deleting roaming cached profiles, I?d like to share the results with you guys for any future reference. CONFIG: Samba 2.2.2 stack release with ACL support linux kernel version 2.4.13-ac4 with ACL many win2ksp2 machines with NTFS PGP 7.0.3 installed on all win

Hi there! I have a Samba 2.2.2 PDC on linux 2.4.13 with ACL (acl.bestbits.at) support installed. There seems to be a problem with Roaming Profiles. Win2k with local NTFS filesystem will never delete roaming profiles (yes, I have regedited the DeleteRoamingCache to 1). In fact, any time TheUser logs back in, a new folder named TheUser.OURDOMAIN.??? (where ? is an integer) will be created,

Dear R-community, my data set looks like 'mat' below. Plant<-c(NA,1,1,1,NA,NA,NA,NA,NA,1); Value1<-rnorm(1:10); Value2<-rnorm(1:10); mat<-cbind(Plant,Value1,Value2); I receive data from two different sites. One site is identified by an interger number, the other site has no data in column Plant=NA. My pb: I'm trying to assign labels "A" or "B" to

Rebooting to try 2.4.7-ac4, I had Xfree86 crash on exit and hang the machine (it does that once a month or so; this notebook gets booted quite often). After fscking the root and another ext2 partition, the system got to the big ext3 partition and just went dead. No message, no disk activity, no keyboard response. I powered down and rebooted 2.4.7-ac3 patched with ext3-2.4-0.9.5-247ac3, and that

ARM subtarget features are determined by parsing the target tuple string TT. (ParseARMTriple(StringRef TT) in ARMMCTargetDesc.cpp) In llc, the -march setting overrides the architecture specified in -mtriple. So when you invoke: $ llc -march arm -mtriple armv7-none-linux ... ParseARMTriple() will see TT == "arm-none-linux" instead of "armv7-none-linux". As a result, the

Sergey, Here's a patch on llvm-gcc which adds a flag "-fuse-llvm-va-arg". (Note that this patch won't ever be part of llvm-gcc upstream. It will most likely be deprecated by later changes.) - pdox -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110220/f814866f/attachment.html>

Hi, on my linux box (2.4.21-pre4-ac4) I've used rsync to mirror a rather large /usr/local tree (4 Gb) After transmission of many files I get the error message rsync error: some files could not be transferred (code 23) at main.c(1045) According to /usr/include/asm/errno.h the code 23 says File table overflow What can I do about that? Many thanks for a hint, Helmut Jarausch Lehrstuhl fuer

FWIW, attached is a similar patch that adds a -falways-use-llvm-vaarg flag to Clang. Applies against mainline. (As discussed, va_arg isn't really supported well so this probably doesn't work well on anything other than simple code, YMMV, etc) ~Will On Thu, May 12, 2011 at 12:29 PM, Arushi Aggarwal <arushi987 at gmail.com> wrote: > Have these changes made it to mainline? Is

Hi, I created the model below, which returns me the following warning message: In sem.default(ram = ram, S = S, N = N, param.names = pars, var.names = vars, : Could not compute QR decomposition of Hessian. Optimization probably did not converge. ######### Model ######## mDPDF = data.frame(mj1,mj2,mj3,mj4,mj5,eL1,eL2,eL3,eL4,eL5,aC1,aC2,aC3,aC4,disR1,disR2,disR3,disR4,disR5,

Evan & llvmdev, I'm seeing a case where ARM Load/Store optimizer is breaking code. I have not had any luck trying to come up with a minimal example; it is breaking in our stage 2 LLVM build. But here's what I'm seeing in the debug output: # Before ARMLoadStoreOptimizer: BB#21: derived from LLVM BB %cond.end Live Ins: %LR %R0 %R1 %R7 %R10 %R11 Predecessors according to

On Mar 2, 2012, at 12:04 AM, David Meyer <pdox at google.com> wrote: > ARM subtarget features are determined by parsing the target tuple string TT. (ParseARMTriple(StringRef TT) in ARMMCTargetDesc.cpp) > > In llc, the -march setting overrides the architecture specified in -mtriple. So when you invoke: > > $ llc -march arm -mtriple armv7-none-linux ... > >

Rafael, I believe your example is not related to IsLegalToCallImmediateAddr. This is an example of calling to an immediate address: typedef int (*funcptr)(void); int main() { funcptr foo = (funcptr)0x100; foo(); } If IsLegalToCallImmedateAddr is true, this generates a call to absolute address 0x100: call 0x100 This requires a relocation of the value 0x100 - PC. (NOTE: this is NOT the

Hi Eli, I have tried this, but the resulting tool-chain was broken. There are only two references to "CALL64m": the definition in X86Instr64bit.td, and an entry in X86InstrInfo.cpp. After commenting both out, compilation of a large application fails with: llc: ScheduleDAG.cpp:462: void llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(): Assertion `Node2Index[SU->NodeNum]

I've committed a fix: r149970. Please try it. I would really appreciate it if you can provide us with a test case (unreduced test case is fine). Evan On 2012 2 4, at 09:46, David Meyer <pdox at google.com> wrote: > Evan & llvmdev, > > I'm seeing a case where ARM Load/Store optimizer is breaking code. I have not had any luck trying to come up with a minimal example;

To get clang to emit va_arg instructions for va_arg() calls, as opposed to manually lowering it in the frontend, same as the llvm-gcc patch sent earlier does. ~Will On Wed, Aug 17, 2011 at 2:41 PM, Eric Christopher <echristo at apple.com> wrote: > > On Aug 17, 2011, at 11:53 AM, Will Dietz wrote: > >> FWIW, attached is a similar patch that adds a -falways-use-llvm-vaarg

After removing CALL64m, the resulting DAG has a cycle that cannot be scheduled. I've attached a PDF of the DAG before instruction selection (-view-isel-dags), and after instruction select (-view-sched-dags). Notice how the flag/chain relationships between MOV64rm and CALL64r make it impossible to schedule. Here's the code being compiled: define ccc void @ArgsFree() nounwind { entry:

Have these changes made it to mainline? Is there a way to get a patch for the backend, which does the actual lowering? Thanks, Arushi On Sun, Feb 20, 2011 at 1:54 PM, David Meyer <pdox at google.com> wrote: > Sergey, > Here's a patch on llvm-gcc which adds a flag "-fuse-llvm-va-arg". > (Note that this patch won't ever be part of llvm-gcc upstream. It will most

On Aug 17, 2011, at 11:53 AM, Will Dietz wrote: > FWIW, attached is a similar patch that adds a -falways-use-llvm-vaarg > flag to Clang. > > Applies against mainline. > > (As discussed, va_arg isn't really supported well so this probably > doesn't work well on anything other than simple code, YMMV, etc) > > ~Will > > On Thu, May 12, 2011 at 12:29 PM,

The second equality here: (in lib/Bitcode/Reader/BitcodeReader.cpp) AtomicOrdering Ordering = GetDecodedOrdering(Record[OpNum+2]); if (Ordering == NotAtomic || Ordering == Release || Ordering == AcquireRelease) return Error("Invalid STOREATOMIC record"); Is failing on this assembly, which was generated by Clang: store atomic i32 0, i32* @mutex release,

Rafael, Use this bitcode: define i32 @main() nounwind { entry: %call = tail call i32 inttoptr (i64 256 to i32 ()*)() nounwind ret i32 0 } And this command: $ llc -mtriple "i686-linux-gnu" test.ll -o test.s -filetype=asm -relocation-model=pic - pdox