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Hi there!! Can someone tell me where I can find 'supported' lex and yacc utilities that work on NT? Pardon me if this question is not relevant in this list.. Please send me the replies directly to my e-mail 'k.sundram@blr.sni.de' ; since I find that this list is getting bigger and better.. Thanx in advance K R Sundaram -- ************************************************ *****

Hi, A new speculative cache side-channel vulnerability has been published at https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability/downloads/straight-line-speculation, named "straight-line speculation”, CVE-2020-13844. In this email, I'd like to explain the toolchain mitigation we've prepared to mitigate against this vulnerability for AArch64.

On Tue, 30 May 2006, [UTF-8] Rafael Esp?ndola wrote: > I have changed the way in which the ARM backend generates a function > return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now > expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch > is attached. Ok, I haven't looked at the code, but you're free to do whatever make sense. > In my

> > Why it is named RETFLAG? > > Historical reason. Originally we didn't have nodes that could > *optionally* have an input flag. A better design, e.g. on PPC would be to > have a PPCISD::RET node, which takes an optional input flag, and always > lower RET to it. I See. I will try to always lower to "(mov)*;bx lr" on ARM. > Flag in the SelectionDAG stuff is

On 5/31/06, Chris Lattner <sabre at nondot.org> wrote: > On Wed, 31 May 2006, [UTF-8] Rafael Esp?ndola wrote: > >> We don't want the copy and shift to wander apart from each other (e.g. we > >> don't want another shift to get scheduled in between them), so we flag > >> them together. In practice, these copies usually get coallesced away. > > In

Hi All, When I tried to create preallocated image with gluster , I am unable to create one The image gets created but not preallocated. [root@ ]# qemu-img create -f qcow2 -o preallocation=full gluster://host1.lab.eng.blr.redhat.com/rep3vol/vm3.img 3G Formatting 'gluster://dhcp37-61.lab.eng.blr.redhat.com/rep3vol/newvm3.img', fmt=qcow2 size=3221225472 encryption=off cluster_size=65536

On Wed, 31 May 2006, [UTF-8] Rafael Esp?ndola wrote: >> We don't want the copy and shift to wander apart from each other (e.g. we >> don't want another shift to get scheduled in between them), so we flag >> them together. In practice, these copies usually get coallesced away. > In the second case shl explicitly uses CL. Shouldn't the register > allocator be

On Jul 29, 2008, at 12:41 PM, Duncan Sands wrote: > Hi, > >> I want to be able to write a function like this >> >> define <2 x double> @add(<2 x double> %a, <2 x double> %b) nounwind { >> %c = add <2 x double> %a, %b >> ret <2 x double> %c >> } >> >> and then call it from C code. What is the appropriate

I propose to present on one or more of the following topics: * NFS-Ganesha Architecture, Roadmap, and Status * Architecture of the High Availability Solution for Ganesha and Samba - detailed walk through and demo of current implementation - difference between the current and storhaug implementations * High Level Overview of autoconf/automake/libtool configuration (I gave a presentation in BLR

On 08/17/2016 09:56 AM, Kaleb S. KEITHLEY wrote: > I propose to present on one or more of the following topics: > > * NFS-Ganesha Architecture, Roadmap, and Status,Jiffin Thotton copresenter. > * Architecture of the High Availability Solution for Ganesha and Samba > - detailed walk through and demo of current implementation > - difference between the current and storhaug

On Tue, 4 May 2004, Chris Lattner wrote: > On Tue, 4 May 2004, Chris Lattner wrote: > > I suspect that a large reason that LLVM does worst than a native C > > compiler with the CBE+GCC is that LLVM generates very low-level C code, > > and I'm not convinced that GCC is doing a very good job (ie, without > > syntactic loops). > > Yup, this is EXACTLY what is

Evan, et al., I've come across a small issue when using the if conversion pass in PPC to generate conditional returns. Here's a small example: ** Before if conversion ** BB#0: derived from LLVM BB %entry %R3<def> = LI 0 %CR0<def> = CMPLWI %R3, 0 BCC 68, %CR0, <BB#3> Successors according to CFG: BB#3(16) BB#1(16) BB#1: derived from LLVM BB

Hi, For the following code: void foo (); int main () {foo();} llvm emits "bl foo" Then I set foo at a far address in linking: aarch64-linux-gnu-gcc -Wl,--defsym=foo=0x80000000 a.o -o a.exe I got an error from ld: a.c:(.text+0x8): relocation truncated to fit: R_AARCH64_CALL26 against symbol `foo' define in *ABS* section in a.exe The question is: do I

Hello, I'm looking to upgrade my Samba from 3.0.4 to 3.0.7. Samba is my PDC currently. Are there any issues that I need to be aware of before I upgrade? Will I need to re-join the domain after the upgrade? Rohan Gilchrist rohan@e-mailme.org http://www.e-mailme.org/~rohan/ 0412 648 909 *************************************************************************** This e-mail and any files

Hi, There are some compilers with a aggressive optimization which restricts function pointer parameters. Let's say opt restrict_args. When restrict_args is turned on, compiler will treat all function pointer parameters as restrict one. int foo(int * a) + restrict_args opt equals to: int foo(int * restrict a) Here is a complete example: source code: extern int num; int foo(int * a) {

Hello, I am currently working with PPC64 JIT support for LLVM. So far I could make function calls work by adding function descriptors in 'lib/Target/PowerPC/PPCJITInfo.h' and adding a virtual method at 'LLVM::TargetJITInfo' that is called within 'JITEmitter::finishFunction' just after 'sys::Memory::InvalidateInstructionCache' to update the Global Mapping with

I have changed the way in which the ARM backend generates a function return. Instead of expanding a RET to a CopyToReg;RETFLAG, it now expands into a CopyToReg;BRIND. I haven't commit it yet, but the patch is attached. In my opinion the resulting code is easier to understand, but I have some questions: Why all backends use RETFLAG? Why it is named RETFLAG? Why the Copy that places the

Dear R users/developers, I am posting on behalf of a friend who is looking for R developers. The requirements are : - Available to work/re-locate to Bangalore, India - Over 5 - 6 years of solid R experience is essential - The ideal candidate should have worked on regression modeling and predictive models - Experience using Big Data technologies (like Hadoop)

Hi, We are hitting a deadlock on libvirt on 0.9.4 version. Can someone help us ? 1) Is there any way to specify timeout for all the calls made by libvirt especially virConnectOpenReadOnly 2) Does virCommandRunAsync always fork a new process ? gdb) bt #0 0x00007fc17b53ce6e in __lll_lock_wait_private () from /lib64/libc.so.6 #1 0x00007fc17b4e3f2d in _L_lock_2164 () from /lib64/libc.so.6 #2

Hello, I was wondering if anyone else has experienced this. >From an XP machine printing to a SAMBA printer, printing is painfully slow. Selecting the printer, and even sending the job through windows makes the app appear non-responsive. The print job is completed fine, but just takes a long time to print. XP boxes with SP1 print like a dream. I've managed to replicate this on 4 boxes