similar to: --delete and --files-from

Hi, I?ve a problem with renaming directories with subdirectories. In root directory I create directory named ?lvl1? with subdirectory ?lvl2? When I rename directory lvl1 to lvl1-new I get: 1. /lvl1-new with subdir lvl2 but I can use only /lvl1-new and not /lvl1-new/lvl2 2. /lvl1 with subdir lvl2 but I can use only /lvl1/lvl2 and not /lvl1 Is it a feature or a bug? If bug is there a fix? PS:

Dear list, im facing an issue of statistical data analysis that I consider myself unable to resolve in R so i hope to get some valuable insights from you. i run an ANOVA with four factors; factor4 is an between factor (two different groups measured), the others are withins (tested across /all/ subjects). accordingly, my model looks as follows: fm1

On Apr 18, 2007, at 2:07 PM, Evan Cheng wrote: > > On Apr 18, 2007, at 11:25 AM, Christopher Lamb wrote: > >> I noticed that the TableGen code emitter generator assumes that >> the instruction fields are declared in the instruction format in >> the same order that operands are defined. This seems like a bad >> dependence to me, and that TableGen should match

I am trying to add support for select_cc. In ARM it can be implemented with: mov $dst, $falseVal cmp $a, $b moveq $dst, $trueVal My current strategy is to expand select_cc in two ARM nodes: ARM::SELECT and ARM::CMP. The two nodes would be connected by a flag edge. ARM::CMP would then expand to "cmp $a, $b". This instruction has no results. It only alters the CPSR (current program

I'm working on enhancing TableGen's type checking and it triggered with a problem in CellSPU's specification: XSHWv4i32: (set VECREG:v8i16:$rDest, (sext:v8i16 VECREG:v4i32:$rSrc)) It's complaining that v4i32 is not smaller than v8i16, which is true in the sense of vector bit size, and true in the sense of vector element size. To me, a sign extension from i32 to i16 makes no

The only multiplication instruction on my target CPU is multiply-and-accumulate. The result goes into a special register that can destructively read at the end of a sequence of multiply-adds. The following sequence is required to so a simple multiply: acc r0 # clear accumulator, discarding its value (r0 reads as 0, and sinks writes) mac rSRC1, rSRC2 # multiply sources, store

On Jan 9, 2007, at 10:01 AM, Scott Michel wrote: > I was able to resolve my previous question about dealing with custom > loads/stores, and following Chris' suggestion, the IBM Cell SPU > backend > can generate code for "int main(void) { return 0; }" without crashing > llc. There's a lot of work still to be done... like getting frame > offsets correctly

On Apr 16, 2009, at 2:19 PM, Greg McGary wrote: > The only multiplication instruction on my target CPU is > multiply-and-accumulate. The result goes into a special register that > can destructively read at the end of a sequence of multiply-adds. The > following sequence is required to so a simple multiply: > > acc r0 # clear accumulator, discarding its value (r0 reads as

I was able to resolve my previous question about dealing with custom loads/stores, and following Chris' suggestion, the IBM Cell SPU backend can generate code for "int main(void) { return 0; }" without crashing llc. There's a lot of work still to be done... like getting frame offsets correctly computed and hauling in the raft of intrinsics that the Cell SDK defines. Three quick

Hi, Correct me if I am wrong but can I translate the R code into Matlab via this package. ie I have a script in R, if I run this package on a Unix emulator can I get the R code displayed in Matlab format ( R code changed into Matlab code). If that is possible that would be great and if so how. Also, If this program cannot do this do you know one that can do this: Regards, James Flood

Hi, I'm trying to find an implementation of monotonic regression in R and I haven't been able to find anything that's really related to this. isoMDS in the MASS package uses monotonic regression, however, I was wondering if there is any standalone function for monotonic regression? Basically what I'm trying to do is implement monotonic regression where I can see not just the

I'm trying to get the MIDI music for the 1996 SegaSoft game Lose Your Marbles (http://appdb.winehq.org/objectManager.php?sClass=version&iId=9196) working. The game itself remains Platinum under 1.3.34-- it runs great, without any overrides, and the sound effects work fine too... it's just the MIDI music that does not play, or rather, is not heard. I went to the Wiki and performed all

Hello, I have been studying LLVM and started to create a new backend for a new RISC architecture. Now I need some help to get forward with my project. I'm quite new to compiling techniques so I'm sorry for the stupid questions. Question 1: My idea is to lower the select SDNode as follows: %res1 = %falseVal %res2 = setc %trueVal, %condition Where setc is conditional mov. The

On Apr 18, 2007, at 11:25 AM, Christopher Lamb wrote: > I noticed that the TableGen code emitter generator assumes that the > instruction fields are declared in the instruction format in the > same order that operands are defined. This seems like a bad > dependence to me, and that TableGen should match the name of field > declared in the instruction with the name of the

Hello, some months ago i wrote to the mailing list asking some questions about register pairing, i've been experimenting several things with the help i got back then. Some background first: this issue is for a backend for an 8bit microcontroller with only 8bit regs, however it has a few 16bit instructions that only work with fixed register pairs, so it doesnt allow all combinations of regs.

I noticed that the TableGen code emitter generator assumes that the instruction fields are declared in the instruction format in the same order that operands are defined. This seems like a bad dependence to me, and that TableGen should match the name of field declared in the instruction with the name of the operand in order to determine which operand of the MI to use . See

On Tue, 9 Jan 2007, Evan Cheng wrote: >> - How does one deal with multiple instruction sequences in a pattern? >> To load a constant is a two instruction sequence, but both >> instructions only take two operands (assume that r3 is a 32-bit >> register): >> >> ilhu $3, 45 # r3 = (45 << 16) >> iohl $3, 5 # r3 |= 5

I want to remove files but only if they are owned by a certain user and group. Basically I have this: find /var/spool/greylist -mmin +363 -exec rm -f {} \; I want to make sure it only deletes files owned by mail. Basically no matter what weird characters are in the file names I want to make sure it does not delete anything outside of /var/spool/greylist. I can add 'sudo -u' to it but

Hello, Thought people might be interested in this. I want my voicemails emailed to a person and not stored on my asterisk server. However, I want them to have a sequential number. I found that if I set the option delete=1 in my voicemail.conf file for the mailbox, then the numbering would keep being restarted. I wrote this shell script to fool Asterisk into numbering my voicemails sequentially

I need to remove empty files out of a directory that are over 6 hours old so I created this script and put it in cron.hourly. #!/bin/sh cd /var/list sudo -u matt find /var/list -mmin +360 -empty -user matt -exec rm {} \; I want to run it as matt rather than root for just an added bit of safety. Problem is I get this. "sudo: sorry, you must have a tty to run sudo" Is there another