Displaying 20 results from an estimated 200 matches similar to: "Confirm email... (Giant-sized gifts, decor and props)"
2007 Aug 25
3
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2007 Aug 25
2
We're going to miss you!
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2011 Oct 04
1
Giant font on the R plots...
Hello,
I've been facing a really stupid problem... When I try to plot using
heatplot or hclust or any similar function, the labels of the x-axis - which
are the samples names - are giant & overlapping. I can't even read the
samples names!
I tried cex.lab = 0.5, it helped only with the y axis and not the x-axis...
Any help please?!
--
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2006 Oct 31
0
6315567 gcc still does not like biosint despite recent gifts
Author: mike_s
Repository: /hg/zfs-crypto/gate
Revision: dd719b124fb1c878d455556154b749c8645a25e1
Log message:
6315567 gcc still does not like biosint despite recent gifts
Files:
update: usr/src/psm/stand/boot/i386/common/biosutil.c
update: usr/src/psm/stand/boot/i386/common/util.h
2013 Apr 21
4
[Bug 63790] New: Nouveau fb boots laptop screen a GIANT BARCODE
https://bugs.freedesktop.org/show_bug.cgi?id=63790
Priority: medium
Bug ID: 63790
Assignee: nouveau at lists.freedesktop.org
Summary: Nouveau fb boots laptop screen a GIANT BARCODE
QA Contact: xorg-team at lists.x.org
Severity: critical
Classification: Unclassified
OS: Linux (All)
Reporter: aka.bugle at
2008 Mar 17
2
sort the collection in the index.rhtml
Hi,
i am using rails 1.2.6 please forgive me as this application is live
and i could not find the time to move it to rails 2.0
i have a index.rhtml for items
item has 3 attributes other than id, they are name, category and size
current status =>
inside the index.rhtml
i obviously already display my data as below:
name category size
a mugs L
aa mugs M
abc
2013 Sep 23
5
[LLVMdev] [GSoC] Flang's end of GSoC report
Hi everyone!
Today is the official "pencils down" day for GSoC and I wrote a report
describing what results I've achieved since my last report in July:
http://flang-gsoc.blogspot.ie/2013/09/end-of-gsoc-report.html
Thanks for this GSoC LLVM!
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2019 Oct 23
2
[cfe-dev] [Openmp-dev] GitHub Migration Starting Now
On Tue, 2019-10-22 at 09:57 -0700, Tom Stellard via cfe-dev wrote:
> On 10/22/2019 09:08 AM, Tom Stellard via Openmp-dev wrote:
> > Hi,
> >
> > We're getting ready to start migrating to GitHub. SVN will be
> > moved to read-only now and we'll
> > begin the process of turning on GitHub commit access. I'll send an
> > email when we're done.
2010 Jul 30
2
logos and goodies
I've got a couple questions related to my search (in vain) for an "R" tshirt
or coffee mug. The first question is simply: is there a higher-resolution
R logo available than the one at r-developer.org? (or the modified one
provided by useR conference pages)
Next: what are the chances of someone in the "R management" setting up a
cafepress.com "R
2013 Sep 23
4
[LLVMdev] [GSoC] Flang's end of GSoC report
On 09/23/13 11:54 PM, Chris Lattner wrote:
>
> On Sep 23, 2013, at 5:25 AM, Alex L <arphaman at gmail.com
> <mailto:arphaman at gmail.com>> wrote:
>
>> Hi everyone!
>>
>> Today is the official "pencils down" day for GSoC and I wrote a
>> report describing what results I've achieved since my last report in
>> July:
>>
2019 Nov 28
3
Instcombine and bitcast of vector. Wrong CHECKs in cast.ll, miscompile in instcombine?
Hi,
In
llvm/test/Transforms/InstCombine/cast.ll
there is a test like this:
target datalayout = "E-p:64:64:64-p1:32:32:32-p2:64:64:64-p3:64:64:64-
a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-
v64:64:64-v128:128:128-n8:16:32:64"
[...]
define <3 x i32> @test60(<4 x i32> %call4) {
; CHECK-LABEL: @test60(
; CHECK-NEXT: [[P10:%.*]] = shufflevector
2020 Jul 08
4
[RFC] Saturating left shift intrinsics
Hello,
This is an RFC for adding intrinsics which perform saturating signed/unsigned left shift.
There is currently a patch on Phabricator here:
https://reviews.llvm.org/D83216
The intrinsics are of the form
i32 @llvm.sshl.sat.i32(i32, i32)
i32 @llvm.ushl.sat.i32(i32, i32)
<4 x i32> @llvm.sshl.sat.v4i32(<4 x i32>, <4 x i32>)
<4 x i32>
2005 Dec 22
9
truncating aggregation output only
Hello dtrace-discuss,
Sometimes I want to run a script for some time and every n second
output N top entries. trunc() isn''t suitable here as it also removed
keys/values. I want it ''coz over time if I use sum() entries which
are normally truncated can actually get to top over a time.
Maybe printa() extension, something like: printa(@b[10]) - to output
top 10?
--
2004 Sep 10
2
Blocking and compression.
On Tue, 2004-01-20 at 23:44, Josh Coalson wrote:
> Miroslav did some experiments with searching for optimum blocksize.
> from what I remember it made at best a couple percent difference.
> there was a thread about it here a while back.
>
Did his changes make it in? I can think of a coupla ways to approach
this and I'd like to hear about what he tried.
A couple of % doesnt seem
2008 Mar 08
3
Problems with installing the rgl package on Linux
Dear All,
I am trying to install the rgl package on R 2.6.1 running on Fedora 8
(Linux), but I am experiencing the following problems:
-----------------------------------------
configure: error: X11 not found but required, configure aborted.
ERROR: configuration failed for package 'rgl'
** Removing '/usr/lib/R/library/rgl'
-----------------------------------------
Any ideas?
2020 Jun 16
3
Codifying our Brace rules-
I'm with Matt on this one. I much prefer the approach of ALWAYS use braces
for ifs and for loops, even if they're not needed, for basically the same
reasons as he put. The number of times I've added a statement inside an if
without braces and forget to add them is annoyingly high, especially as
it's not always an obvious error upfront. Similarly, being involved in a
downstream
2020 Jun 08
2
Nested instruction patterns rejected by GlobalISel when having registers in Defs
Hi Daniel,
Thanks for replying; I was hoping to get in touch with you on this issue.
I had a look at how SelectionIDAG does it when generating the matcher table,
and it does consider the implicit defs as additional output. Here is the
match table generated for the pattern:
/* 0*/ OPC_CheckOpcode, TARGET_VAL(ISD::SIGN_EXTEND),
/* 3*/ OPC_MoveChild0,
/* 4*/ OPC_CheckOpcode,
2020 Jun 04
2
Nested instruction patterns rejected by GlobalISel when having registers in Defs
Hi Dominik,
Thanks for your reply.
In my case, the Defs is the cause of the problem. Or rather, it is part of
the problem, because when I remove it from the instruction TableGen gives me
a different error message which concerns a part which is deeper into the
pattern tree, so at least it is able to proceed beyond that part of the
pattern. I have also stepped TableGen inside gdb and
2013 Sep 23
0
[LLVMdev] [GSoC] Flang's end of GSoC report
On Sep 23, 2013, at 5:25 AM, Alex L <arphaman at gmail.com> wrote:
> Hi everyone!
>
> Today is the official "pencils down" day for GSoC and I wrote a report describing what results I've achieved since my last report in July:
>
> http://flang-gsoc.blogspot.ie/2013/09/end-of-gsoc-report.html
>
> Thanks for this GSoC LLVM!
Wow, this is really fantastic
2004 Sep 10
4
Blocking and compression.
I did some research on patent claims on range and arithmetic coding. The
original range code pdf presented in the UK by an ibm employee at the
time asserts no patent claims what so ever. If there are patents I cant
find em. I have the original paper in PDF if anyone cares to see it. Its
a good candidate for encoding because browsing a few of the
implememntations avaialable on line, I can roll my