similar to: adding a new log-format escape

Wayne, I noticed that rsync's "*deleting" itemize output needs two trailing spaces now that the other itemize codes are 11 characters wide. See the patch below. Matt ------------- Index: log.c =================================================================== RCS file: /cvsroot/rsync/log.c,v retrieving revision 1.179 diff -u -r1.179 log.c --- log.c 10 Jul 2007 13:55:49

Hi, Note that one significant change to read.dcf() that happened since R 3.0.2 is the addition of support for arbitrary long lines (commit 63281), which never worked: dcf <- paste(c("aa: ", rep(letters, length.out=10000)), collapse="") writeLines(dcf, "test.dcf") nchar(read.dcf("test.dcf")) # aa # [1,] 8186 The culprit being line

On Sun, Aug 20, 2017 at 8:54 AM, Ivan A. Kosarev via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hello Daniel, > > > The problem with the way you are trying to show this is that > > there are many ways to prove no-alias, and TBAA is one of them. > > The reason i stare at dump files and debug info is precisely to > > separate the TBAA portion from the rest.

Hi, Intel Advanced Matrix Extensions (Intel AMX) is a new programming paradigm consisting of two components: a set of 2-dimensional registers (tiles) representing sub-arrays from a larger 2-dimensional memory image, and accelerators able to operate on tiles. Capability of Intel AMX implementation is enumerated by palettes. Two palettes are supported: palette 0 represents the initialized state and

[Yuanke] AMX register is special. It needs to be configured before use and the config instruction is expensive. To avoid unnecessary tile configure, we collect the tile shape information as much as possible and combine them into one ldtilecfg instruction. The ldtilecfg instruction should dominate any AMX instruction that access tile register. On the other side, the ldtilecfg should post-dominated

The AMX registers are complicated. The single configuration register (which is mostly used implicitly, similar to MXCSR for floating point) controls the shape of all the tile registers, and if you change the tile configuration every single tile register is cleared. In practice, if we have to change the the configuration while any of the tile registers are live, performance is going to be terrible.

Hi, I have question about __builtin_object_size behaviour. LLVM for __builtin_object_size function doesn't calculate correct value when pointer is used only in __builtin_object_size function call, and never after that. For this case LLVM as result generates 0 or -1 depends of second argument of __builtin_object_size function. Is this correct behaviour or it should work as gcc (gcc

Hi Hal, There is 3 aspect to be solved. 1. The HW support max shape 16x16, so there are many register classes from 1x1 to 16x16. We need 256 register classes. 2. We want to support variable shape, so compiler don't know what register class to fit tile shape as it is only known in runtime. 3. The tile configure is to configure physical tile register, so we need to allocate

Mark II of the patch set. The first patch (dynsumlen2.patch) increments the protocol version to support per-file dynamic block checksum sizes. It is a prerequisite for varsumlen2.patch. varsumlen2.patch implements per-file dynamic block and checksum sizes. The current block size calculation only applies to files between 7MB and 160MB setting the block size to 1/10,0000 of the file length for a

On 08/20/2017 11:22 AM, Daniel Berlin via llvm-dev wrote: > Sorry, hit send early. > > > On Sun, Aug 20, 2017 at 9:16 AM, Daniel Berlin <dberlin at dberlin.org > <mailto:dberlin at dberlin.org>> wrote: > > > > On Sun, Aug 20, 2017 at 8:54 AM, Ivan A. Kosarev via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at

There is no problem to have 256 register classes. Just a lot of register classes to me. We don't assume the shape of each physical register be 16x16, it is defined by user. For variable shape, I mean the shape is known in runtime and in compile time the shape is unknown. Take below code as an example, the %row and %col are variable instead of constant. Compiler recognizes llvm.x86.tileloadd64

> When the tile shape is unknown at compile time, how do you plan to do the register allocation of the tiles? My question is: do you do the allocation for this case in the same way as you would if you knew the size was 16x16 (i.e., conservatively assume the largest size)? I think what will happen is that the registers are allocated based on a number of runtime values that are assumed to be

Hi! This is an artifact of how LLVM works. Essentially, LLVM detects that `var` is unused and deletes it before it tries to lower the `llvm.objectsize` (which is what clang lowers `__builtin_object_size` to) call to a constant. While this isn't ideal, I don't think it realistically a problem, because `var` must be otherwise unused for this behavior to occur, and the whole purpose of

c'est quoi cette chelouzerie ? je parle de l'ajout du sizeof(DWORD)... et ce que ce serait pas un str*n*cpy ou s*n*printf la vraie solution ? Arno 2012/5/3 Frederic BOHE <fbohe-guest at alioth.debian.org>: > Author: fbohe-guest > Date: Thu May ?3 08:31:38 2012 > New Revision: 3554 > URL: http://trac.networkupstools.org/projects/nut/changeset/3554 > > Log: >

Dear all: I need the help desparately. The code is attached below. If you guys don't mind take a look at the code below and see how to fit speex's AEC into it. Help me look at the #defines, and give me some suggestions on the AEC parameters, I totally have no idea about them. Feel free to do anything with the code, if it is by any chance valuable. Any ideas or suggestions or sharing

FINALLY, it's here. You can now tell SSH which address to bind to for every single port forwarding option! This patch allows you to pass the following as ssh command line options: ssh -L 192.168.1.55:1234:localhost:80 -R ::11:22:aa:bb/80/localhost/80 etc. Or as normal config file options: LocalForward ::11:22:33/1234 localhost/80 RemoteForward 1.2.3.4:80 localhost:80 It will also

On 21/09/2015 4:50 PM, Herv? Pag?s wrote: > Hi, > > Note that one significant change to read.dcf() that happened since R > 3.0.2 is the addition of support for arbitrary long lines (commit > 63281), which never worked: > > dcf <- paste(c("aa: ", rep(letters, length.out=10000)), collapse="") > writeLines(dcf, "test.dcf") >

I'm in the midst of coding a patch set for consideration that will bump the protocol version and have a couple of observations. The current minimum backwards-compatible protocol is 15 but we have code that checks for protocol versions as old as 12. If someone else doesn't beat me to it i'm considering cleaning out the pre-15 compatibility code. A backwards compatibility patch could

The width and height can be runtime values that we would just copy into 64 byte configuration block we pass to ldtilecfg. So the code doesn't need to be multiversioned. The user code would also use those values to update pointers in the loops they write using the tiles. If we can't determine that two tiles were defined with the same width and height we need to assume the shape is different

These assorted patches end up with adding virtio-scsi support to libguestfs. It passes libguestfs-test-tool, but I haven't yet tried to run the full set of tests. In theory > 26 devices can be added, but it's likely that certain parts of the daemon will break if you actually try this. This of course needs to be fixed. Thanks Paolo Bonzini for invaluable help. Rich.