similar to: extension of rsync on crypted files

Displaying 20 results from an estimated 2000 matches similar to: "extension of rsync on crypted files"

2013 Sep 26
1
How to authenticate against SQL DB with custom-ciphered passwords?
Hello, I'm about to start developing authentication/password-scheme module for Dovecot. So I would like to get some advice before actually committing to doing things in particular way. Hope somebody will be able to help me :) For the record, I am currently targeting latest stable Dovecot version 2.2.5. I have an SQL DB with mail users' authentication data. Passwords are stored either
2012 Aug 30
1
[LLVMdev] PHI
I'm getting this error in my mips16 port. I think that PHI replacement is done in some target independent phase. In the process of debugging this. Maybe to someone else it's obvious how this can happen . tia, Reed *** Bad machine code: MBB exits via unconditional fall-through but its successor differs from its CFG successor! *** - function: main - basic block: BB#0 entry
2017 Jan 17
32
[PATCH 0/6] drm/nouveau: Enable HDMI Stereoscopy
This is an initial implementation of HDMI 3D mode support for the nouveau kernel driver. It works on all of the hardware that I have available to test at the moment, but I am unsure as to the overall approach taken for setting HDMI InfoFrames, there's no support for g84 or gf119 disps, and the criteria for enabling stereo support for an output seems a bit iffy. The first four patches arrange
2016 Oct 03
5
Is this undefined behavior optimization legal?
Hi, I've found a test case where SelectionDAG is doing an undefined behavior optimization, and I need help determining whether or not this is legal. Here is the example IR: define void @test(<4 x i8> addrspace(1)* %out, float %a) { %uint8 = fptoui float %a to i8 %vec = insertelement <4 x i8> <i8 0, i8 0, i8 0, i8 0>, i8 %uint8, i32 0 store <4 x i8> %vec, <4
2004 Oct 06
3
flac-1.1.1 completely broken on linux/ppc and on macosx if built with the standard toolchain (not xcode)
Sadly the latest optimization broke completely everything. The asm code isn't gas compliant. the libFLAC linker script has a typo, disabling the asm optimization and/or altivec won't let a correct build anyway. Instant fixes for the asm stuff: sed -i -e"s:;:\#:" on the lpc_asm.s to load address instead of addis+ori you could use lis and la and PLEASE use the @l(register)
2016 Jun 24
6
RFC: Strong GC References in LLVM
This is a proposal to add strong GC reference types to LLVM. We have some local (downstream) patches that are needed to prevent LLVM's optimizer from making transforms that are problematic in the presence of a precise relocating GC. Adding a notion of a strong GC reference to LLVM will let us upstream these patches in a principled manner, and will act as a measure to avoid new problematic
2012 Aug 01
2
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld.
LLVM Command Line Library I'm proposing a heavy weight command line parsing and generating library for LLVM to replace Clang's parser and provide one for lld and any future tools that may need it. The scope of this library is slightly larger than what Clang has now, but not much. It is centered around the concept of a Tool. A Tool has a set of Options which can be parsed to Arguments or
2013 Nov 11
2
[LLVMdev] What's the Alias Analysis does clang use ?
Hi, LLVM community: I found basicaa seems not to tell must-not-alias for __restrict__ arguments in c/c++. It only compares two pointers and the underlying objects they point to. I wonder how clang does alias analysis for c/c++ keyword restrict. let assume we compile the following code: $cat myalias.cc float foo(float * __restrict__ v0, float * __restrict__ v1, float * __restrict__ v2, float *
2015 Jun 07
21
[PATCH RFC 00/20] expose global performance counters
Hello, This series exposes global performance counters (PCOUNTER) to the userspace through the nvif interface by reworking most of the code related to the PM engine. This interface will allow the userspace to control and monitor complex hardware events like the proprietary driver already does, for example with CUPTI and PerfKit. For now, this series only exposes performance counters on NV50,
2011 Sep 07
0
[LLVMdev] bug in TableGen when generating RegisterInfo?
On Tue, Sep 6, 2011 at 9:34 PM, Alexandru Dura <alexdura at gmail.com> wrote: > Hi everyone, > > I found some peculiar behavior of TableGen when generating > [TARGET]GenRegisterInfo.inc. Some register overlaps are generated twice in > this file, leading to a compilation error. Hi, What do you mean "overlapped register"? > I think this is because in
2017 Jun 14
5
Implementing cross-thread reduction in the AMDGPU backend
On 06/13/2017 07:33 PM, Matt Arsenault wrote: > >> On Jun 12, 2017, at 17:23, Tom Stellard <tstellar at redhat.com <mailto:tstellar at redhat.com>> wrote: >> >> On 06/12/2017 08:03 PM, Connor Abbott wrote: >>> On Mon, Jun 12, 2017 at 4:56 PM, Tom Stellard <tstellar at redhat.com <mailto:tstellar at redhat.com>> wrote: >>>> On
2013 Nov 28
2
[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
I"m getting build errors I think from one of your patches O tjoml. You need to have a build area that builds with clang and does warnings as errors to avoid these issues on putback. here is my configure step for example: /home/rkotler/llvm_trunk/configure --enable-werror --prefix=/home/rkotler/ll vm/install CC=/home/rkotler/llvm_3_2/install/bin/clang CXX=/home/rkotler/llvm_3_
2016 Apr 20
2
[PATCH v4 27/37] clk: make pstate a pointer to nvkm_pstate
On 18/04/16 22:14, Karol Herbst wrote: > we will access the current set cstate at least every second and this safes us saves > some CPU cycles looking them up every second. > > Signed-off-by: Karol Herbst <nouveau at karolherbst.de> > --- > drm/nouveau/include/nvkm/subdev/clk.h | 2 +- > drm/nouveau/nvkm/engine/device/ctrl.c | 5 ++++- >
2016 Feb 18
5
RFC: Add guard intrinsics to LLVM
On Wed, Feb 17, 2016 at 8:53 PM, Philip Reames <listmail at philipreames.com> wrote: > I think you're jumping ahead a bit here. I'm not sure the semantics are > anywhere near as weird as you're framing them to be. :) I now think this weirdness actually does not have to do anything with guard_on or bail_to_interpeter, but it has to do with deopt bundles itself. Our
2011 Jun 19
2
RFT: virtio_net: limit xmit polling
OK, different people seem to test different trees. In the hope to get everyone on the same page, I created several variants of this patch so they can be compared. Whoever's interested, please check out the following, and tell me how these compare: kernel: git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git virtio-net-limit-xmit-polling/base - this is net-next baseline to test
2011 Jun 19
2
RFT: virtio_net: limit xmit polling
OK, different people seem to test different trees. In the hope to get everyone on the same page, I created several variants of this patch so they can be compared. Whoever's interested, please check out the following, and tell me how these compare: kernel: git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git virtio-net-limit-xmit-polling/base - this is net-next baseline to test
2010 Feb 18
1
an error about " return some vectors from some functions within a function"
Dear all, When I try to return some vectors from some functions within a function, it indicate an error," Error in rbind(ck1, ck2, ck3) : object 'ck1' not found", in one of the iterations and stop.  Since I am not experienced in programming, can anyone give me a suggestion to inspect this error? The followings are the functions I created : ################### # functions in the
2011 Aug 18
3
Error message: object of type 'closure' is not subsettable
Dear R-users I need to calibrate kappa, rho, eta, theta, v0 in the following code, see below. However when I run it, I get: y <- function(kappahat, rhohat, etahat, thetahat, v0hat) {sum(difference(k, t, S0, X, r, implvol, q, kappahat, rhohat, etahat, thetahat, v0hat)^2)} > nlminb(start=list(kappa, rho, eta, theta, v0), objective = y, lower =lb, > upper =ub) Error in dots[[1L]][[1L]] :
2016 Sep 19
3
[arm, aarch64] Alignment checking in interleaved access pass
Hi, As a follow up to Patch D23646 <https://reviews.llvm.org/D23646>, I'm trying to figure out if there should be an alignment check and what the correct approach is. Some background: For stores, the pass turns: %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> store <12 x i32> %i.vec, <12 x i32>* %ptr
2011 Sep 06
3
[LLVMdev] bug in TableGen when generating RegisterInfo?
Hi everyone, I found some peculiar behavior of TableGen when generating [TARGET]GenRegisterInfo.inc. Some register overlaps are generated twice in this file, leading to a compilation error. I think this is because in RegisterInfoEmitter.cpp, RegisterAliases are declared as "std::map<Record*, std::set<Record*>, LessRecord>" and a requirement for std::map is that the