similar to: Emulation question

Please use the correct link : http://63.145.236.72:8011 and ignore the previous. Also log for broken build is here: make[1]: Entering directory `/home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/lib/Support' llvm[1]: Compiling APFloat.cpp for Release+Asserts build llvm[1]: Compiling APInt.cpp for Release+Asserts build In file included from APFloat.cpp:15: In file

The host c++ standard library is missing <utility>, it appears. On Sep 20, 2011, at 11:22 AM, Galina Kistanova wrote: > Please use the correct link : > http://63.145.236.72:8011 > and ignore the previous. > > Also log for broken build is here: > > make[1]: Entering directory >

Yeah. That code has been there since r91421 and wouldn't have failed recently otherwise. Did something change on the host? -eric On Sep 20, 2011, at 11:27 AM, Jim Grosbach wrote: > The host c++ standard library is missing <utility>, it appears. > > > On Sep 20, 2011, at 11:22 AM, Galina Kistanova wrote: > >> Please use the correct link : >>

Motivation At the moment, when targeting armv7a, clang defaults to generate code as if -mcpu=cortex-a8 was specified. When targeting armv8a, it defaults to generate code as if -mcpu=cortex-a53 was specified. This leads to surprising code generation, by the compiler optimizing for a specific micro-architecture, whereas the intent from the user was probably to generate code that is

Sandeep Patel wrote: > My goal is to have Cortex-A9 support complete in far less than three > months. I've recently gotten some additional help toward that goal, so > the pace should pick up soon. > > As far as compiler texts, there are many newer texts to recommend as > just about all the major optimization passes are done differently > after SSA-form appeared in about

Hi Renato, It's definitively not A15. Can this be the case that NEON units for cortex-A9 support it but isn't documented/recommended ? And as mentioned before code is working ! Seb > -----Original Message----- > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > Renato Golin > Sent: Friday, November 09, 2012 6:27 PM > To: Sebastien DELDON-GNB >

cat /proc/cpuinfo ? Are you sure it's generating VFMA and not VMLA? On Fri, Nov 9, 2012 at 9:35 AM, Sebastien DELDON-GNB < sebastien.deldon at st.com> wrote: > Hi Renato, > > It's definitively not A15. Can this be the case that NEON units for > cortex-A9 support it but isn't documented/recommended ? > And as mentioned before code is working ! > > Seb >

Hi Galina, folks, Does anyone have an idea why the A9 bots are unstable on Clang? They all seem to be the same problem: 1. <eof> parser at end of file Segmentation fault http://lab.llvm.org:8011/builders/clang-native-arm-cortex-a9/builds/26073/steps/check-all/logs/Clang%3A%3Adead-stores.c

Hi Bastien, Weird gcc is generating fma for my platform STEricsson Novathor with Linaro, code works. It also works when I use LLVM to generate fma (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? Seb From: JF Bastien [mailto:jfb at google.com] Sent: Friday, November 09, 2012 5:36 PM To: Sebastien DELDON-GNB Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu Subject:

Hi all, On following code when I use llc targeting ARM Cortex-A9 as follows, if vmlx-forwarding is turned off then 'vmla' instructions are generated. It seems that -mcpu=cortex-a9 enables it by default and thus less 'vmla' instructions are generated. On this specific example it doesn't make any difference in term of performance, but on a more complex example disabling

Hi Sebastien, ARMv7-M has VFMA and LLVM's "triple" is far from perfect. Wikipedia tells me NovaThor can also be A15, or STE could have cramped a VFPv4 in it? ;) Or possibly, your code never branches into the VFMA. Many things could be happening, but usually, VFMA shouldn't be generated for A9. A GCC bug, maybe? On 9 November 2012 16:51, Sebastien DELDON-GNB

Hi Anitha, Thanks for your answer but -mcpu=cortex-a9 -mattr=+vfp4 doesn' t enable fused mac generation for me. I would like just to understand why -mtriple=armv7-eabi enables it while -mcpu=cortex-a9 seems to disable it ? Seb > -----Original Message----- > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > Sent: Thursday, November 08, 2012 10:22 AM > To: Sebastien

Hi Renato, Thank you very much for the directions, I am going to recommit my fix. What are hardware used in buildbots? Are these common boards like PandaBoard or some thing special? What is RAM installed? Thanks, --Serge 2014-12-11 2:36 GMT+06:00 Renato Golin <renato.golin at linaro.org>: > On 10 December 2014 at 19:06, Serge Pavlov <sepavloff at gmail.com> wrote: > > In

AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA isn't a fused multiply-add, it's a multiply followed by an add and has different latency as well as precision. On Thu, Nov 8, 2012 at 4:57 AM, Sebastien DELDON-GNB < sebastien.deldon at st.com> wrote: > Hi Anitha,

Understood, Same architecture, different micro-arch (implementation). Could this be the case that vmlx-forwarding make senses for SWIFT and not for ARM Cortex-A9 implementation ? It is enabled by default when -mcpu=cortex-a9 is used but test have made show significant improvements when disabled for cortex-A9 (STEricsson Nova platform). Best Regards Seb From: David Tweed [mailto:david.tweed at

Thanks Bradley. I see that the features set in /ARM.td/ get written to the generated file /<build>/llvm/lib/Target/ARM/ARMGenSubtargetInfo.inc./ Here the ProcA9 features appear in /ARMFeatureKV/ table: /{ "a9", "Cortex-A9 ARM processors", { ARM::ProcA9 }, { *ARM::FeatureFP16* } }, /With your change, the features for ProcA9 in the above entry are empty.//This

On 12 February 2013 10:25, Sebastien DELDON-GNB <sebastien.deldon at st.com>wrote: > Same architecture, different micro-arch (implementation). Could this be > the case that vmlx-forwarding make senses for SWIFT and not for ARM > Cortex-A9 implementation ? It is enabled by default when –mcpu=cortex-a9 is > used but test have made show significant improvements when disabled for

My goal is to have Cortex-A9 support complete in far less than three months. I've recently gotten some additional help toward that goal, so the pace should pick up soon. As far as compiler texts, there are many newer texts to recommend as just about all the major optimization passes are done differently after SSA-form appeared in about 1991. However, for adding Cortex-A8 support, I don't

Thanks for everyone giving their feedback! I saw pretty unanimous support for making -mcpu=generic the default and making -mcpu=generic schedule for an in-order CPU (Cortex-A8 in this case). I'll be making those changes shortly. I think the comments also make clear that it's less obvious whether we'd want -mcpu=native to become a default. It's probably good for some use cases, but

I did the initial work on vmla formation. The default settings for cortex-a8 / a9 due to micro-architecture difference (i believe a8 TRM talks about vmla hazards) and extensive testing. That said, given the limitation of the current pre-RA scheduling pass, it's likely the use of vmla can caused regressions. Im not opposed to changing the setting for a9. However, it's not a good idea to