Displaying 20 results from an estimated 300 matches similar to: "Cant find out MCE reason (CPU 35 BANK 8)"
2011 Jul 22
0
[PATCH] Dump mce log by ERST when mc panic
Dump mce log by ERST when mc panic
We have implemented basic ERST logic before. Now linux3.0 as dom0 has included APEI logic. Hence it''s time to add mce apei interface and enable APEI ERST feature.
With it, it can save mce log by ERST method when mc panic.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
diff -r ca2f58c2dfea xen/arch/x86/cpu/mcheck/mce.c
---
2010 Jun 22
4
New kernel causes hardware error?
I have recently upgraded to 2.6.18-194.3.1.el5 and within several days
the machine crashed with the following error (repeating in mcelog):
MCE 0
HARDWARE ERROR. This is *NOT* a software problem!
Please contact your hardware vendor
CPU 2 BANK 8 MISC 41
MCG status:
MCi status:
Error overflow
Uncorrected error
MCi_MISC register valid
Processor context corrupt
MCA: MEMORY CONTROLLER AC_CHANNEL0_ERR
2012 Nov 13
1
mce error
During booting of Centos6 I see an error message that goes something like:
Starting mcelog daemon [FAILED]
AMD Processor family 15: Please load edac_mce_amd module.
CPU is unsupported
The only helpful information I have found is in the "preview" of
https://access.redhat.com/knowledge/solutions/158503. I don't have a
RedHat account, so
2011 Mar 24
6
Kernel Panic on HP/Compaq ProLiant G7
Hello Everyone,
I recently installed CentOS 5.5 x86_64 on a brand new ProLiant DL380 G7. I have identical OS software running reock-solid on two other DL380 ProLiant servers, but they are G6 models, not G7. On the G7, the installation went perfectly and the machine ran great for about 2 weeks, when it just seemed to "stop". The system stopped responding on the network, and there was
2010 Jul 07
1
kernel: Machine check events logged
Hello,
every few hours I get the following message in /var/log/message:
Jul 5 20:23:28 hXXX kernel: Machine check events logged
Jul 5 20:53:28 hXXX kernel: Machine check events logged
Jul 5 22:13:28 hXXX kernel: Machine check events logged
Jul 5 23:53:28 hXXX kernel: Machine check events logged
Jul 5 23:58:27 hXXX kernel: Machine check events logged
Jul 6 01:38:27 hXXX kernel: Machine
2010 Mar 23
0
[PATCH] x86: s3: ensure CR4.MCE is enabled after mcheck_init()
Changeset 21045: 7751288b1386 introduces a potential issue: CR4.MCE is enabled
before mcheck_init() -- thought looks I don''t meet with an actual issue with
this, we''d better fix it.
Thanks,
-- Dexuan
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Xen-devel@lists.xensource.com
http://lists.xensource.com/xen-devel
2009 Jun 03
0
TINY MCE Jrails media upload
Hi
Can anybody give me idea to do media upload in rails using tiny_mce and
jrails ?
Thanks !
--
Ruby on Rails Developer
http://sandip.sosblog.com
http://funonrails.wordpress.com
www.joshsoftware.com
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2012 Oct 26
0
[PATCH] MCE: Allow AMD MSRs injected via xen-mceinj
Allow AMD MSRs injected via xen-mceinj
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
--
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Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
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2013 Mar 14
1
[PATCH v2 0/2] AMD MCE fixes
Boris,
Here is the updated patch for determining number of regiter banks on
AMD plus a patch removing shared_bank array, as you suggested.
Offline/online testing didn''t show any issues.
Boris Ostrovsky (2):
x86/mce: Replace shared_bank array with is_shared_bank() helper
x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
arch/x86/kernel/cpu/mcheck/mce_amd.c | 38
2016 Jan 22
0
Bug#812166: [PATCH] x86/mce: fix misleading indentation in init_nonfatal_mce_checker().
On 22/01/16 14:38, Ian Campbell wrote:
> Debian bug 812166[0] reported this build failure due to
> Wmisleading-indentation with gcc-6:
>
> non-fatal.c: In function 'init_nonfatal_mce_checker':
> non-fatal.c:103:2: error: statement is indented as if it were guarded by... [-Werror=misleading-indentation]
> switch (c->x86_vendor) {
> ^~~~~~
>
>
2011 Apr 06
0
[PATCH] X86: Fix mce offline page bug
X86: Fix mce offline page bug
c/s 19913 break mce offline page logic:
For page_state_is(pg, free), it''s impossible to trigger the case;
For page_state_is(pg, offlined), it in fact didn''t offline related page;
This patch fix the bug, and remove an ambiguous comment.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
diff -r 808735ebbb59 xen/common/page_alloc.c
---
2012 Sep 07
2
[PATCH] x86/hvm: don't give vector callback higher priority than NMI/MCE
Those two should always be delivered first imo.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/irq.c
+++ b/xen/arch/x86/hvm/irq.c
@@ -395,16 +395,16 @@ struct hvm_intack hvm_vcpu_has_pending_i
struct hvm_domain *plat = &v->domain->arch.hvm_domain;
int vector;
- if ( (plat->irq.callback_via_type == HVMIRQ_callback_vector)
-
2013 Mar 14
0
[PATCH v2 2/2] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
Currently number of error reporting register banks is hardcoded to
6 on AMD processors. This may break in virtualized scenarios when
a hypervisor prefers to report fewer banks than what the physical
HW provides.
Since number of supported banks is reported in MSR_IA32_MCG_CAP[7:0]
that''s what we should use.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---
2010 Dec 12
2
CMCI exceptions happened and MCE entry state transition made Xen crashed.
Hi all,
Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error.
I am not sure why so many CMCI happened , maybe there were some thing wrong with the hardware.
2010 Dec 12
2
CMCI exceptions happened and MCE entry state transition made Xen crashed.
Hi all,
Three days ago, the server reported lots of CMCI exceptions and Xen 3.4.2 printed hundreds of "CMCI: send CMCI to DOM0 through virq" messages to the console . From the console output, Then I can see that Dom0 try to read the MSR_CAP regs by #GP trap in order to log the MCA error.
I am not sure why so many CMCI happened , maybe there were some thing wrong with the hardware.
2016 Jan 22
2
Bug#812166: [PATCH] x86/mce: fix misleading indentation in init_nonfatal_mce_checker().
Debian bug 812166[0] reported this build failure due to
Wmisleading-indentation with gcc-6:
non-fatal.c: In function 'init_nonfatal_mce_checker':
non-fatal.c:103:2: error: statement is indented as if it were guarded by... [-Werror=misleading-indentation]
switch (c->x86_vendor) {
^~~~~~
non-fatal.c:97:5: note: ...this 'if' clause, but it is not
if (
2012 Dec 05
1
Recursive locking in Xen (in reference to NMI/MCE path audit)
Hello,
While auditing the NMI/MCE paths, I have encountered some issues with
recursive locking in Xen, discovered by the misuse of the console_lock
intermittently as a regular lock and as a recursive lock.
The comment in spinlock.h is unclear as to whether mixing recursive and
non recursive calls on the same spinlock is valid. If the calls are
genuinely not valid, then surely regular spinlocks
2012 Dec 04
2
Audit of NMI and MCE paths
I have just starting auditing the NMI path and found that the oprofile
code calls into a fair amount of common code.
So far, down the first leg of the call graph, I have found several
ASSERT()s, a BUG() and many {rd,wr}msr()s. Given that these are common
code, and sensible in their places, removing them for the sake of being
on the NMI path seems silly.
As an alternative, I suggest that we make
2012 Nov 16
5
[ 3009.778974] mcelog:16842 map pfn expected mapping type write-back for [mem 0x0009f000-0x000a0fff], got uncached-minus
Hi Konrad,
Sometime ago i reported this one at boot up:
[ 3009.778974] mcelog:16842 map pfn expected mapping type write-back for [mem 0x0009f000-0x000a0fff], got uncached-minus
[ 3009.788570] ------------[ cut here ]------------
[ 3009.798175] WARNING: at arch/x86/mm/pat.c:774 untrack_pfn+0xa1/0xb0()
[ 3009.807966] Hardware name: MS-7640
[ 3009.817677] Modules linked in:
[ 3009.827524] Pid:
2013 Mar 14
1
[PATCH] x86/mce: Use MCG_CAP MSR to find out number of banks on AMD
Currently number of error reporting register banks is hardcoded to
6 on AMD processors. This may break in virtualized scenarios when
a hypervisor prefers to report fewer banks that the physical HW
provides.
Since number of supported banks is reported in MSR_IA32_MCG_CAP[7:0]
that''s what we should use.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---